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參數(shù)資料
| 型號： | T2117-TAQ |
| 廠商： | ATMEL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Zero-Voltage Switch with Adjustable Ramp |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | SO-8 |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 80K |
| 代理商： | T2117-TAQ |
T2117
Rev. A2, 17-Dec-01
3 (11)
whereby:
I
L
V
M
P
=
=
=
Latching current of the triac
Mains supply, effective
Power load (user’s power)
Total current consumption is influenced by the firing
pulse width which can be calculated as follows:
R
sync
V
M
2 sin (
tp
2
)
0.6 V
3.5
10
5
A
49 k
0.01
0.10
1.00
10.00
10
100
1000
10000
t
p
P ( W
)
I
L
( mA)
100
50
200
V
Mains
= 230 V
～
Figure 5. Output pulse width
0
400
800
1200
1600
2000
0
200
400
600
800
1000 1200 1400
R
tp ( s )
V
Mains
= 230 V
～
Figure 6. Synchronization resistance
Supply Voltage
The T2117 contains voltage limiting and can be con-
nected with the mains supply via the diode D
1
and the
resistor R
1
. Supply voltage between Pin 5 and 7 is limited
to a typical value of 9.5 V.
The series resistance R
1
can be calculated (figures 7
and 8) as follows:
R
1max
= 0.85
V
Mmin –
V
Smax
2 I
tot
;
P
(R1)
=
(V
M –
V
S
)
2
2 R
1
I
tot
= I
S
+ I
P
+ I
x
whereby:
V
M
V
S
I
tot
I
S
I
x
= Mains voltage
= Limiting voltage of the IC
= Total current consumption
= Current requirement of the IC (without load)
= Current requirement of other peripheral
components
P
(R1)
= Power dissipation at R
1
0
3
6
9
12
0
10
20
30
40
50
R
1
I
tot
( mA )
15
V
Mains
=230V
Figure 7. Maximum resistance of R
1
0
3
6
9
12
0
I
tot
( mA )
15
V
Mains
=230V
1
2
3
4
6
P
5
R
Figure 8. Power dissipation of R
1
according to current consumption
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|---|---|
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