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參數(shù)資料
| 型號(hào)： | SYM53C770 |
| 廠商： | LSI Corporation |
| 英文描述： | SCSI I/O Processor With Ultra SCSI(帶超級(jí)SCSI的SCSI I/O處理器) |
| 中文描述： | 的SCSI I / O處理器與超的SCSI（帶超級(jí)的SCSI的的SCSI的I / O處理器） |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 73K |
| 代理商： | SYM53C770 |
Data Sheet
SYM53C770
Single-Chip High-Performance Ultra SCSI (Fast-20) I/O Processor
Designed for use in multi-user systems including network file servers, multitasking
mid-range computers, supercomputers, and minicomputers.
Ultra SCSI (Fast-20) technology doubles the I/O bandwidth up to 40 MB/s Builds
upon proven technology—a pin-for-pin replacement for the SYM53C720 Provides
new features for enhanced performance and flexibility.
The SYM53C770 includes all of the features of the SYM53C720 with added support for
Ultra SCSI (Fast-20) transfers, enabling the chip to transfer SCSI data at up to 20 MB/s
on an 8-bit bus and up to 40 MB/s on a 16-bit bus. Fast-20 is an extension of the SCSI-
3 standard that expands the bandwidth of the SCSI bus and allows faster synchronous
SCSI transfer rates. When enabled, Fast-20 effectively doubles the synchronous
transfer rates of Fast SCSI-2.
The SYM53C770 allows easy firmware upgrades and is SCRIPTS -compatible (the
Symbios -developed SCSI programming language) with the SYM53C7XX and
SYM53C8XX families. The device provides full SCSI-2 capabilities and features
Symbios TolerANT SCSI driver and receiver technology for reliable operation in all
cabling environments.
Performance enhancements of the SYM53C770 include an additional 4 KB of internal
RAM for SCRIPTS instruction storage, which reduces system bus bandwidth
requirements, and allows tailored SCSI sequences to be executed locally--saving the
system bandwidth for other tasks. A 96-byte DMA FIFO provides more efficient
throughput from/to the host to/from the SCSI bus during high latency DMA bus
requests. Other new features include:
An increase in the maximum synchronous SCSI offset from 8 to 16 levels--allowing
better speed matching during Fast-20 transfers
A SCSI clock doubler allows the use of a 40/50 MHz oscillator, which is doubled
internally to provide the correct frequency for Fast-20 transfer modes
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