參數(shù)資料
型號： SY89875UMI TR
廠商： Micrel Inc
文件頁數(shù)： 1/10頁
文件大?。?/td> 0K
描述： IC CLK BUFF DVDR 1:2 2GHZ 16-MLF
標準包裝： 1,000
系列： Precision Edge®
類型： 扇出緩沖器（分配），除法器
電路數(shù)： 1
比率 - 輸入:輸出： 1:2
差分 - 輸入:輸出： 是/是
輸入： CML，HSTL，LVDS，LVPECL
輸出： LVDS
頻率 - 最大： 2GHz
電源電壓： 2.375 V ~ 2.625 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-VFQFN 裸露焊盤，16-MLF?
供應(yīng)商設(shè)備封裝： 16-MLF?（3x3）
包裝： 帶卷 (TR)
其它名稱： SY89875UMITR
SY89875UMITR-ND
1
Precision Edge
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
Integrated programmable clock divider and 1:2
fanout buffer
Guaranteed AC performance over temperature and
voltage:
> 2.0GHz f
MAX
< 200ps tr/tf
< 15ps within device skew
Low jitter design:
< 10ps
PP total jitter
< 1ps
RMS cycle-to-cycle jitter
Unique input termination and V
T Pin for DC-coupled
and AC-coupled Inputs; CML, PECL, LVDS and
HSTL
LVDS compatible outputs
TTL/CMOS inputs for select and reset
Parallel programming capability
Programmable divider ratios of 1, 2, 4, 8 and 16
Low voltage operation 2.5V
Output disable function
–40°C to 85°C temperature range
Available in 16-pin (3mm x 3mm) MLF package
FEATURES
2.5V, 2.0GHz ANY DIFF. IN-TO-LVDS
PROGRAMMABLE CLOCK DIVIDER AND 1:2
FANOUT BUFFER W/ INTERNAL TERMINATION
Precision Edge
SY89875U
APPLICATIONS
SONET/SDH line cards
Transponders
High-end, multiprocessor servers
Rev.: D
Amendment: /0
Issue Date:
August 2007
This low-skew, low-jitter device is capable of accepting a
high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS
or HSTL clock input signal and dividing down the frequency
using a programmable divider to create a lower speed
version of the input clock. Available divider ratios are 2, 4, 8
and 16, or straight pass-through.
The differential input buffer has a unique internal
termination design that allows access to the termination
network through a V
T pin. This feature allows the device to
easily interface to different logic standards. A V
REF-AC
reference is included for AC-coupled applications.
The /RESET input asynchronously resets the divider. In
the pass-through function (divide by 1) the /RESET
synchronously enables or disables the outputs on the next
falling edge of IN (rising edge of /IN).
FUNCTIONAL BLOCK DIAGRAM
TYPICAL PERFORMANCE
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
IN
/IN
S1
S0
Q1
/Q1
Q0
/Q0
509
/RESET
VT
VREF_AC
S2
Divided
by
2, 4, 8
or 16
Enable
MUX
Enable
FF
Decoder
Divide-by-4
CML/LVPECL/LVDS
622MHz
Clock In
OC-12 to OC-3
Translator/Divider
LVDS
155.5MHz
Clock Out
622MHz In
/Q0
Q0
/IN
IN
155.5MHz Out
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參數(shù)描述
SY89876L 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.0GHz ANY DIFFERENTIAL IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
SY89876L_0708 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.0GHz ANY DIFFERENTIAL IN-TO-LVDS
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SY89876LMG TR 功能描述:時鐘驅(qū)動器及分配 3.3V LVDS Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
SY89876LMGTR 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 2.0GHz ANY DIFFERENTIAL IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
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