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參數(shù)資料
| 型號(hào)： | SY89843UMG |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MUX CML RPE 2:1 PREC 24-MLF |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 系列： | SY89 |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 2:1 |
| 獨(dú)立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，24-MLF? |
| 供應(yīng)商設(shè)備封裝： | 24-MLF?（4x4） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1090 (CN2011-ZH PDF) |
| 其它名稱： | 576-2097-5 SY89843UMG-ND |
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Micrel, Inc.
SY89843U
Oct. 1, 2013
4
M9999-052207-B
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
5, 2
23, 20
IN0, /IN0,
IN1, /IN1
Differential Inputs: These input pairs are the differential signal inputs to the
device. These inputs accept AC- or DC-coupled signals as small as 100mV
(200mVPP). Each pin of a pair internally terminates to a VT pin through 50.
Please refer to the “Input Interface Applications” section for more details.
4, 22
VT0, VT1
Input Termination Center-Tap: Each side of the differential input pair terminates
to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network
for maximum interface flexibility. Please refer to the
“Input Interface Applications”
section for more details.
3, 21
VREF-AC0
VREF-AC1
Reference Voltage: These outputs bias to VCC–1.2V. They are used for AC-
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01F low ESR capacitor to VCC. Maximum sink/source current
is ±1.5mA. Please refer to the
“Input Interface Applications” section for more
details.
15
SEL
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25k pull-up resistor
and will default to logic HIGH state if left open.
1, 6, 9, 10,
13, 19, 24
VCC
Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close
to VCC pins as possible.
7, 8
11, 12
Q0, /Q0
Q1, /Q1
Differential Outputs: These differential LVPECL outputs are a logic function of the
IN0, IN1, and SEL inputs. Please refer to the truth table below for details.
14, 17, 18
GND
Exposed Pad
Ground: Ground pin and exposed pad must be connected to the same ground
plane.
16
CAP
Power-On Reset (POR) Initialization capacitor. When using the multiplexer with
RPE capability, the pin is tied to a capacitor to VCC. The purpose is to ensure the
internal RPE logic starts up in a known state. See
“Power-On Reset (POR)
Description” section for more details regarding capacitor selection. If this pin is
tied directly to VCC, the RPE function will be disabled and the multiplexer will
function as a normal multiplexer. The CAP pin should never be left open.
Truth Table
INPUTS
OUTPUTS
IN0
/IN0
IN1
/IN1
SEL
Q
/Q
0
1
X
0
1
0
X
0
1
0
X
0
1
0
1
X
1
0
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89843UMG TR | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Precision 2:1 LVPECL RPE & FSI MUX w/ 1:2 Fanout (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY89843UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVPECL Runt Pulse Eliminator 2:1 |
| SY89844U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 MUX with 1:2 Fanout and Internal Termination |
| SY89844U_10 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 |
| SY89844UMG | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 2.5V 2:1 RPE/FSI LVDS MUX w/ 1:2 Fanout (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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