Precision Edge SY89828L MicreL, Inc. M9999-012208 hbwhelp@micrel.com or (408) 955-1690 PIN DESCRIPTION" />
參數(shù)資料
型號(hào)： SY89828LHG
廠商： Micrel Inc
文件頁(yè)數(shù)： 7/13頁(yè)
文件大?。?/td> 0K
描述： IC CLK BUF MUX TRNSL 2:10 64TQFP
標(biāo)準(zhǔn)包裝： 160
系列： Precision Edge®
類型： 扇出緩沖器（分配），多路復(fù)用器，變換器
電路數(shù)： 2
比率 - 輸入:輸出： 2:10
差分 - 輸入:輸出： 是/是
輸入： LVDS，PECL
輸出： LVDS
頻率 - 最大： 1GHz
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 64-EP-TQFP
包裝： 托盤(pán)
3
Precision Edge
SY89828L
MicreL, Inc.
M9999-012208
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTIONS
Internal
Pin Number
Pin Name
I/O
Type
P/U
Pin Function
5, 6
LVDS_CLKA
Input
LVDS
3.5k
Differential clock input selected by CLK_SEL1, SEL1 and
/LVDS_CLKA
Pull-up
SEL2. Can be left floating if not selected. Floating input, if
See Fig. 2
selected produces an indeterminate output. Has internal
100 termination.
2, 3
LVDS_CLKB
Input
LVDS
3.5k
Differential clock input selected by CLK_SEL1, SEL1 and
/LVDS_CLKB
Pull-up
SEL2. Can be left floating if not selected. Floating input, if
See Fig. 2
selected produces an indeterminate output. Has internal
100 termination.
8, 9
LVPECL_CLKA
Input
LVPECL
75k
Differential clock input selected by CLK_SEL1, SEL1
/LVPECL_CLKA
pull-down
and SEL2. Can be left floating. Floating input, if selected
See Fig. 1
produces a LOW at output. Requires external termination.
12, 13
LVPECL_CLKB
Input
LVPECL
75k
Differential clock input selected by CLK_SEL2, SEL1
/LVPECL_CLKB
pull-down
and SEL2. Requires external termination.
See Fig. 1
7
CLK_SEL1
Input
LVTTL/
11k
Selects LVDS_CLKA input when LOW and
CMOS
Pull-up
LVPECL_CLKA input when HIGH.
14
CLK_SEL2
Input
LVTTL/
11k
Selects LVDS_CLKB input when LOW and
CMOS
Pull-up
LVPECL_CLKB input when HIGH.
16
SEL1
Input
LVTTL/
11k
Selects input source CLKA when LOW and CLKB
CMOS
Pull-up
when HIGH for outputs Q0 – Q9 and /Q0 – /Q9.
1
SEL2
Input
LVTTL/
11k
Selects input source CLKA when LOW and CLKB
CMOS
Pull-up
when HIGH for outputs Q10 – Q19 and /Q10 – /Q19.
11
OE1
Input
LVTTL/
11k
Enable input synchronized internally to prevent output
CMOS
Pull-up
glitches or runt pulses.
15
OE2
Input
LVTTL/
11k
Enable input synchronized internally to prevent output
CMOS
Pull-up
glitches or runt pulses.
4
VCCI
Power
Core VCC connected to 3.3V supply. Not connected to
VCCO internally. Connected to VCCO on PCB.
Bypass with 0.1F in parallel with 0.01F low ESR
capacitors as close to VCC pins as possible.
17, 32, 40,
VCCO
Power
Output buffer VCC connected to 3.3V suppy. Not connected
41, 49, 64
to VCCI internally. Connected to VCCI on PCB.
Bypass with 0.1F in parallel with 0.01F low ESR
capacitors as close to VCC pins as possible.
10
GNDI
Power
Core ground not connected to GNDO internally.
To be connected to GNDO on PCB.
33, 48
GNDO
Power
Output buffer ground not connected to GNDI internally.
To be connected to GNDI on PCB.
63, 61, 59, 57, 55
Q0 – Q9
Output
LVDS
Differential clock outputs from CLKA when SEL1 = LOW
53, 51, 47, 45, 43
and from CLKB when SEL1 = HIGH. Q outputs are static
when OE1 = LOW. Unused output pair must be terminated
with 100 to maintain low jitter and skew.
62, 60, 58, 56, 54
/Q0 – /Q9
Output
LVDS
Differential clock outputs (complement) from CLKA when
52, 50, 46, 44, 42
SEL1 = LOW and from CLKB when SEL1 = HIGH. /Q
outputs are static HIGH when OE1 = LOW. Unused output
pairs must be externally terminated with 100 to maintain
low jitter and skew.
39, 37, 35, 31, 29
Q10 – Q19
Output
LVDS
Differential outputs from CLKA when SEL2 = LOW and
27, 25, 23, 21, 19
from CLKB when SEL2 = HIGH. Q outputs are static LOW
when OE2 = LOW. Unused output pairs must be externally
terminated with 100 to maintain low jitter and skew.
相關(guān)PDF資料
PDF描述
SY10EP11UZC IC CLOCK BUFFER 1:2 3GHZ 8-SOIC
SY10EP11UKI TR IC CLOCK BUFFER 1:2 3GHZ 8-MSOP
SY10EP11UKI IC CLOCK BUFFER 1:2 3GHZ 8-MSOP
V300A12H500BL2 CONVERTER MOD DC/DC 12V 500W
SY10EP11UZI IC CLOCK BUFFER 1:2 3GHZ 8-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SY89828LHI 功能描述:IC CLK BUF MUX TRNSL 2:10 64TQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:Precision Edge® 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無(wú) 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6
SY89828LHITR 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1GHz DUAL 1:10 PRECISION LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX
SY89828LHY 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V Dual 1:10 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SY89828LHY TR 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V Dual 1:10 LVDS Fanout/Translator (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SY89828LHYTR 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1GHz DUAL 1:10 PRECISION LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*