參數(shù)資料
型號: SY88793VKC
廠商: Micrel Inc
文件頁數(shù): 1/8頁
文件大?。?/td> 0K
描述: IC AMP POST PECL 3.3/5V 10-MSOP
標準包裝: 100
類型: 限幅后置放大器
應用: 光纖學網(wǎng)絡
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-MSOP
包裝: 管件
1
SY88793V
Micrel, Inc.
M9999-072505
hbwhelp@micrel.com or (408) 955-1690
3.3V/5V 622Mbps PECL LOW-POWER
LIMITING POST AMPLIFIER WITH TTL
SIGNAL DETECT
SY88793V
Rev.: B
Amendment: /0
Issue Date:
July 2005
TYPICAL APPLICATIONS CIRCUIT
APPLICATIONS
s 622Mbps SONET/SDH
s Small form factor transceivers
s High-gain line driver and line receiver
s Single 3.3V or 5V power supply
s Up to 622Mbps operation
s Low noise PECL data outputs
s Chatter-free TTL Signal Detect (SD) output
s TTL EN input
s Programmable SD level set (SD
LVL)
s Available in a tiny 10-pin MSOP (3mm) package
FEATURES
DESCRIPTION
The SY88793V low-power limiting post amplifier is
designed for use in fiber optic receivers. The device connects
to typical transimpedance amplifiers (TIAs). The linear signal
output from TIAs can contain significant amounts of noise
and may vary in amplitude over time. The SY88793V
quantizes these signals and outputs PECL level waveforms.
The SY88793V operates from a single +3.3V or +5V
power supply, over temperatures ranging from –40
°C to
+85
°C. With its wide bandwidth and high gain, signals with
data rates up to 622Mbps and as small as 5mVp-p can be
amplified to drive devices with PECL inputs.
The SY88793V generates a TTL SD output. A
programmable signal-detect level set pin (SD
LVL) sets the
sensitivity of the input amplitude detection. SD asserts high
if the input amplitude rises above the threshold set by SD
LVL
and deasserts low otherwise. EN deasserts the true output
signal without removing the input signal. Typically 6dB SD
hysteresis is provided to prevent chattering.
VCC
EN
GND
To
CDR
SY88793V
100k
0.1F
From
Transimpedance
Amp.
DOUT
/DOUT
VREF
VCC
SDLVL
DIN
/DIN
0.1
F
0.1
F
0.1
F
0.1
F
SD
50
50
Rpd
For 3.3V, Rpd = 120
For 5V, Rpd = 220
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