參數(shù)資料
型號: SY10EP32VKG
廠商: Micrel Inc
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC DIVIDER /2 3.3/5V 8-MSOP
標(biāo)準(zhǔn)包裝: 100
系列: 10EP
邏輯類型: 除以 2
方向:
元件數(shù): 1
每個元件的位元數(shù): 1
復(fù)位: 異步
計數(shù)速率: 4GHz
觸發(fā)器類型: 正,負
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
1
Precision Edge
SY10EP32V
SY100EP32V
Micrel, Inc.
M9999-111605
hbwhelp@micrel.com or (408) 955-1690
CLK
/CLK
RESET
Q
/Q
XX
Z
L
H
Z/Z
L
F
DESCRIPTION
■ Guaranteed maximum frequency > 4GHz
■ 3.3V and 5V power supply options
■ Guaranteed propagation delay <440ps over
temperature
■ Internal 75K input pull-down resistors
■ Wide operating temperature range: –40°C to +85°C
■ Available in 8-pin MSOP and SOIC packages
The SY10/100EP32V is an integrated ÷2 divider with
differential clock inputs.
The VBB pin, an internally generated voltage supply,
is available to this device only. For single-ended input
conditions, the unused differential input is connected to
VBB as a switching reference voltage. VBB may also rebias
AC-coupled inputs. When used, decouple VBB and VCC
via a 0.01F capacitor and limit current sourcing or sinking
to 0.5mA. When not used, V
BB should be left open.
The reset pin is asynchronous and is asserted on the
rising edge. Upon power-up, the internal flip-flops will
attain a random state; the reset allows for the
synchronous use of multiple EP32’s in a system.
The 100k series includes internal temperature
compensation circuitry.
FEATURES
PIN NAMES
5V/3.3V
÷ 2 DIVIDER
Pin
Function
CLK, /CLK
ECL Clock Inputs
Reset
ECL Asynchronous Reset
VBB
Reference Voltage Output
Q, /Q
ECL Data Outputs
Rev.: D
Amendment: /0
Issue Date:
September 2005
Precision Edge
SY10EP32V
SY100EP32V
TRUTH TABLE(1)
Note 1:
Z = LOW-to-HIGH Transition
/Z = HIGH-to-LOW Transition
F = Divide by 2 function.
ECL Pro
ECL Pro is a trademarks of Micrel, Inc.
Precision Edge is a registered trademarks of Micrel, Inc.
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