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參數(shù)資料
| 型號(hào)： | SY100EL15ZI TR |
| 廠(chǎng)商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | 100EL, Precision Edge® |
| 類(lèi)型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | ECL，PECL |
| 輸出： | ECL，PECL |
| 電源電壓： | 3 V ~ 3.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | SY100EL15ZITR SY100EL15ZITR-ND |
1
Precision Edge
SY10EL15
SY100EL15
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
The SY10/100EL15 are low skew 1:4 clock distribution
chips designed explicitly for low skew clock distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. If a single-ended
input is to be used the VBB output should be connected
to the CLK input and bypassed to VCC via a 0.01
F
capacitor. The VBB output is designed to act as the
switching reference for the input of the EL15 under single-
ended input conditions, as a result this pin can only
source/sink up to 0.5mA of current.
The EL15 features a multiplexed clock input to allow
for the distribution of a lower speed scan or test clock
along with the high speed system clock. When LOW (or
left open and pulled LOW by the input pull-down resistor)
the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the
outputs will only be enabled/disabled when they are
already in the LOW state. This avoids any chance of
generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The internal flip flop is clocked on the falling edge of the
input clock, therefore all associated specification limits
are referenced to the negative edge of the clock input.
FEATURES
DESCRIPTION
Precision Edge
SY10EL15
SY100EL15
s 50ps output-to-output skew
s Synchronous enable/disable
s Multiplexed clock input
s 75K
internal input pull-down resistors
s Available in 16-pin SOIC package
1:4 CLOCK
DISTRIBUTION
1
Rev.: H
Amendment: /0
Issue Date:
March 2006
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY100EL15ZI | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| SY100EL15ZC TR | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| SY100EL15LZI | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| SY100EL15LZC TR | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| SY100EL15LZC | IC CLOCK BUFFER MUX 2:4 16-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EL16S | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:5V VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER |
| SY100EL16SKC | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:5V VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER |
| SY100EL16SZC | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:5V VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER |
| SY100EL16V | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:3.3V/5V 1GHz DIFFERENTIAL PECL/ECL RECEIVER/BUFFER |
| SY100EL16VA | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:ENHANCED DIFFERENTIAL RECEIVER |
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