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參數(shù)資料
| 型號： | SY100E196 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | Programmable Delay Chip with Analog Input(可編程延遲芯片（帶邏輯輸入）) |
| 中文描述： | 可編程延時芯片與模擬輸入（可編程延遲芯片（帶邏輯輸入）） |
| 文件頁數(shù)： | 8/9頁 |
| 文件大小： | 79K |
| 代理商： | SY100E196 |
8
ClockWorks
SY10E196
SY100E196
Micrel
Ordering
Code
Package
Type
Operating
Range
SY10E196JC
J28-1
Commercial
SY10E196JCTR
J28-1
Commercial
SY100E196JC
J28-1
Commercial
SY100E196JCTR
J28-1
Commercial
delays (1111111 on the A
0
–
A
6
address bus), D
7
will be
asserted to signal the need to cascade the delay to the
next E196 device. When D
7
is asserted, the SET MIN
pin of chip #2 will be de-asserted and the delay will be
controlled by the A
0
–
A
6
address bus. Chip #1, on the
other hand, will have its SET MAX pin asserted, resulting
in the device delay to be independent of the A
0
–
A
6
address bus.
When the SET MAX pin of chip #1 is asserted, the D
0
and D
1
latches will be reset, while the rest of the latches
will be set. In addition, to maintain monotonicity, an
additional gate delay is selected in the cascade circuitry.
As a result, when D
7
of chip #1 is asserted, the delay
increases from 31.75 gates to 32 gates. A 32-gate delay
is the maximum delay setting for the E196.
When cascading multiple PDCs, it will prove more cost-
effective to use a single E196 for the MSB of the chain,
while using E195 for the lower order bits. This is due to
the fact that only one fine tune input is needed to further
reduce the delay step resolution.
PRODUCT ORDERING CODE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY10E196 | Programmable Delay Chip with Analog Input(可編程延遲芯片（帶邏輯輸入）) |
| SY10E196JC | PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT |
| SY10E241JC | 8-BIT SCANNABLE REGISTER |
| SY100E241JC | 8-BIT SCANNABLE REGISTER |
| SY10E241JCTR | 8-BIT SCANNABLE REGISTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E196JC | 功能描述:IC DELAY LINE 7TAP 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100E, Precision Edge® 標(biāo)準(zhǔn)包裝:2,500 系列:- 標(biāo)片/步級數(shù):- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數(shù):4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100E196JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT |
| SY100E196JI | 功能描述:IC DELAY LINE 7TAP 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100E, Precision Edge® 標(biāo)準(zhǔn)包裝:2,500 系列:- 標(biāo)片/步級數(shù):- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數(shù):4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100E196JITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT |
| SY100E196JY | 功能描述:延遲線/計時元素 Programmable Delay Chip (I Temp, Lead Free) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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