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參數(shù)資料
| 型號(hào)： | SY100E142JZ |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-BIT SHIFT REGISTER |
| 中文描述： | 100E SERIES, 9-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PQCC28 |
| 封裝： | LEAD FREE, PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 71K |
| 代理商： | SY100E142JZ |
1
SY10E142
SY10E142
SY100E142
Micrel, Inc.
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
I
700MHz min. shift frequency
I
Extended 100E V
EE
range of –4.2V to –5.5V
I
9 bits wide for byte-parity applications
I
Asynchronous Master Reset
I
Dual clocks
I
Fully compatible with industry standard 10KH,
100K ECL levels
I
Internal 75K
input pulldown resistors
I
Fully compatible with Motorola MC10E/100E142
I
Available in 28-pin PLCC package
FEATURES
9-BIT SHIFT
REGISTER
The SY10/100E142 are high-speed 9-bit shift registers
designed for use in new, high-performance ECL systems.
The E142 can accept serial or parallel data to be shifted out
in one direction as both serial and parallel outputs. The
nine inputs, D
0
-D
8
, accept parallel input data, while S-IN
accepts serial input data.
The SEL (Select) control pin serves to determine the
mode of operation, either SHIFT or LOAD. The shift direction
is from bit 0 to bit 8. The input data has to meet the set-up
time before being clocked into the nine input registers on
the rising edge of CLK
1
or CLK
2
. Shifting is also performed
on the rising edge of either CLK
1
or CLK
2
. The MR (Master
Reset) control signal asynchronously resets all nine
registers to a logic LOW when a logic HIGH is applied to
MR.
The E142 is designed for applications such as diagnostic
scan registers, parallel-to-serial conversions and is also
suitable for byte-wide parity.
DESCRIPTION
Rev.: E
Issue Date: March 2006
Amendment: /0
PIN NAMES
Pin
Function
D
0
-D
8
Parallel Data Inputs
S-IN
Serial Data Input
SEL
Mode Select Input
CLK
1
, CLK
2
Clock Inputs
MR
Master Reset
Q
0
-Q
8
Data Outputs
V
CCO
V
CC
to Output
BLOCK DIAGRAM
1
D Q
0
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
8
S-IN
SEL
MR
CLK1
CLK2
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
D
0
相關(guān)PDF資料 |
PDF描述 |
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| SY100E142JZTR | 9-BIT SHIFT REGISTER |
| SY100E143JZ | 9-BIT HOLD REGISTER |
| SY100E143JZTR | 9-BIT HOLD REGISTER |
| SY100E150JZ | 6-BIT D LATCH |
| SY100E150JZTR | 6-BIT D LATCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E142JZ TR | 功能描述:寄存器 9-bit Shift Register (Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E142JZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:9-BIT SHIFT REGISTER |
| SY100E143 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:9-BIT HOLD REGISTER |
| SY100E143JC | 功能描述:IC HOLD REGISTER 9-BIT 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 移位寄存器 系列:100E 標(biāo)準(zhǔn)包裝:1,000 系列:- 邏輯類型:移位寄存器 輸出類型:差分 元件數(shù):1 每個(gè)元件的位元數(shù):4 功能:串行至并行 電源電壓:4.2 V ~ 5.7 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) |
| SY100E143JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:9-BIT HOLD REGISTER |
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