參數(shù)資料
型號(hào): SUM60N10-17
廠商: Vishay Intertechnology,Inc.
英文描述: N-Channel 100-V (D-S) 175C MOSFET
中文描述: N溝道100 -五(副)175C MOSFET的
文件頁(yè)數(shù): 2/3頁(yè)
文件大?。?/td> 173K
代理商: SUM60N10-17
SPICE Device Model SUM60N10-17
Vishay Siliconix
www.vishay.com
2
Document Number: 72140
09-Jun-04
SPECIFICATIONS (T
J
= 25
°
C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Conditions
Simulated
Data
Measured
Data
Unit
Static
Gate Threshold Voltage
V
GS(th)
V
DS
= V
GS
, I
D
= 250
μ
A
3.2
V
On-State Drain Current
a
I
D(on)
V
DS
5 V, V
GS
= 10 V
366
A
V
GS
= 10 V, I
D
= 30 A
0.013
0.013
V
GS
= 6 V, I
D
= 20 A
0.015
0.015
V
GS
= 10 V, I
D
= 30 A, T
J
= 125
°
C
0.024
Drain-Source On-State Resistance
a
r
DS(on)
V
GS
= 10 V, I
D
= 30 A, T
J
= 175
°
C
0.030
Forward Voltage
a
Dynamic
b
V
SD
I
F
= 30 A, V
GS
= 0 V
0.90
1
V
Input Capacitance
C
iss
4377
4300
Output Capacitance
C
oss
482
450
Reverse Transfer Capacitance
C
rss
V
GS
= 0 V, V
DS
= 25 V, f = 1 MHz
239
175
pF
Total Gate Charge
c
Q
g
57
65
Gate-Source Charge
c
Q
gs
25
25
Gate-Drain Charge
c
Q
gd
V
DS
= 50 V, V
GS
= 10 V, I
D
= 60 A
19
19
nC
Turn-On Delay Time
c
t
d(on)
25
15
Rise Time
c
t
r
12
12
Turn-Off Delay Time
c
t
d(off)
17
30
Fall Time
c
t
f
V
DD
= 50 V, R
L
= 1.5
I
D
60 A, V
GEN
= 10 V, R
G
= 2.5
10
10
Source-Drain Reverse Recovery Time
t
rr
I
F
= 50 A, di/dt = 100 A/
μ
s
110
125
ns
Notes
a.
b.
c.
Pulse test; pulse width
300
μ
s, duty cycle
2%.
Guaranteed by design, not subject to production testing.
Independent of operating temperature.
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