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參數(shù)資料
| 型號(hào)： | STV9425-STV9425B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | MULTISYNC ON-SCREEN DISPLAY FOR MONITOR |
| 中文描述： | 多頻屏幕的監(jiān)視器顯示 |
| 文件頁(yè)數(shù)： | 5/15頁(yè) |
| 文件大?。?/td> | 184K |
| 代理商： | STV9425-STV9425B |
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TIMINGS
Symbol
Parameter
Min.
Typ.
Max.
Unit
OSCILATOR INPUT : XTI (see Figure 2)
T
WH
T
WL
F
XTAL
F
PXL
Clock High Level
Clock Low Level
Clock Frequency
Pixel Frequency
20
20
TBD
ns
ns
MHz
MHz
15
50
RESET
T
RES
Reset Low Level Pulse
4
μ
s
R, G, B, FBLK (C
LOAD
= 30pF)
T
RISE
T
FALL
T
SKEW
Rise Time (Note1)
Fall Time (Note 1)
Skew between R, G, B, FBLK (Note 1)
I
2
C INTERFACE : SDA AND SCL (see Figure 3)
5
5
5
ns
ns
ns
F
SCL
T
BUF
T
HDS
T
SUP
T
LOW
T
HIGH
T
HDAT
T
SUDAT
T
F
SCL Clock Frequency
Time the bus must be free between2 access
Hold Timefor Start Condition
Set up Time for Stop Condition
The Low Period of Clock
The High Period of Clock
Hold TimeData
Set up Time Data
Fall Time of SDA
0
1
MHz
ns
ns
ns
ns
ns
ns
ns
ns
500
500
500
400
400
0
375
20
T
R
Rise Time ofBoth SCL and SDA
Depend onthe pull-up resistor
and the load capacitance
Note 1 :
These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes
characterization on batches comming from corners ofour processes and also temperature characterization.
9
XTI
TWH
TWL
9
Figure 2
SDA
T
BUF
T
HDS
T
SUDAT
T
HIGH
T
LOW
SCL
T
HDAT
T
SUP
STOP
START
DATA
STOP
9
Figure3
STV9425 - STV9425B - STV9426
5/15
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