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參數(shù)資料
| 型號(hào)： | STV7778S |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32K FLASH |
| 中文描述： | 偏轉(zhuǎn)處理器多同步監(jiān)測 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 125K |
| 代理商： | STV7778S |
7
VERTICAL SECTION
Operating Conditions
Symbol
VSVR
Parameter
Test conditions
On Pin 34
Min.
0
Typ.
Max.
5.5
Unit
V
Vertical Sync Input Voltage
7
Electrical Characteristics
(V
CC
= 12V, T
amb
= 25°C)
Symbol
I
BIASP
Parameter
Test conditions
For V
23-28-29
= 2V
Min.
Typ.
2
Max.
Unit
μ
A
Pin 23-28-29 Bias Current (Current sourced
by PNP base)
Pin 31 Bias Current (Current sunk by NPN
base)
Vertical Sync Input Threshold Voltage
I
BIASN
For V
31
= 6V
0.5
μ
A
VSth
Pin 34;
High-level
Low-level
2
0.8
V
V
μ
A
VSBI
Vertical Sync Input Bias Current
(Current Sourced by PNP Base)
Voltage at Ramp Bottom Point
Voltage at Ramp Top Point (with Sync)
Voltage at Ramp Top Point (without Sync)
Output Current Range on Pin 27 during Ramp
Charging Time. Current to Charge Capacitor
between Pin 27 and Ground
V
34
= 0.8V
1
V
RB
V
RT
V
RTF
I
R27
On Pin 27
On Pin 27
On Pin 27
V
= 2V (Note 2),
2V < V
< 5V
Min current
Max current
Pin 34
Pin 34
On Pin 27, with 150nF cap
Measured on Pin 27,
Cosc (Pin27) = 150nF
With C
27
= 150nF
±
5%
On Pin 30 (see Note 1),
(0°C < T
amb
< 70°C)
V
= 6V, C
= 150nF,
50Hz < F < 120Hz
V
= 2V, V
= X = 4.3V,
2.5V < V
27
< 4.5V
2/8
5/8
V
REF-V
V
REF-V
V
VRT-0.1
100
5
15
135
20
μ
A
μ
A
μ
S
%
μ
S
Hz
VSW
VSmDut
VSTD
VFRF
Minimum Vertical Sync Pulse Width
Vertical Sync Input Maximum Duty-cycle
Vertical Sawtooth Discharge Time Duration
Vertical Free Running Frequency (V
28
= 2V)
15
85
100
ASFR
RATD
AUTO-SYNC Frequency (see Note 3)
Ramp Amplitude Thermal Drift
50
120
Hz
100
ppm/°C
RAFD
Ramp Amplitude Drift Versus Frequency
200
ppm/Hz
Rlin
Ramp Linearity on Pin 27
I
27
/I
27
0.5
%
Rload
Minimum Load on Pin 25 for less than 1%
Vertical Amplitude Drift
Vertical Position Adjustment Voltage on
Pin 32
50
M
Vpos
V
33
= 2V
V
33
= 4V
V
33
= 6V
3.65
3.2
3.5
3.8
±
2
3.3
V
V
V
I
VPOS
Max Current on Vertical Position Control
Output (Pin 32)
Vertical Output Voltage (on Pin 30)
(Peak to Peak Voltage on Pin 30)
mA
Vor
V
31
= 2V
V
31
= 4V
V
31
= 6V
See Note 4
On Pin 30
V/V30pp at T/4
V/V30pp at 3T/4
3.75
2
3
4
2.2
V
V
V
V
OUTDC
V0I
dVS
DC Voltage on Vertical Output (Pin30)
Vertical Output Maximum Output Current
Max Vertical S-Correction Amplitude
(V
= 2V Inhibits S-CORR; V
= 6V gives
Maximum S-CORR) (see Figure 3)
C-Correction Adjustment Range Voltage on
Pin 27 for Maximum Slope on the Ramp
(with S-Correction) (see Figure 4)
7/16
±
5
-4
+4
V
REF-V
mA
%
%
Ccorr
V
29
= 2V
V
29
= 4V
V
29
= 6V
3
3.5
4
V
V
V
Notes :
1. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes
characterization on batches comming from corners of our processes and also temperature characterization.
2. When 2V are applied on Pin 28 (Vertical S-Correction control), then the S-Correction is inhibited, consequently the sawtooth have
a linear shape.
3. It is the frequency range for which the VERTICAL OSCILLATOR will automatically synchronize, using a single capacitor value on
Pin 27 and with a constant ramp amplitude.
4. Typically 3.5V for Vertical reference voltage typical value (8V).
STV7778S
8/11
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