參數(shù)資料
型號: STV6435D
廠商: 意法半導體
英文描述: Filtered Video Buffers for STB and DVD Devices
中文描述: 濾波的視頻機頂盒和DVD設備緩沖器
文件頁數(shù): 7/17頁
文件大小: 337K
代理商: STV6435D
7/17
STV6435
Electrical Characteristics
2.3.1
Video Section (Y and CVBS Signals)
Test conditions: T
AMB
= 25°C, V
CC
= 5 V; V
CCB
= 5 V; R
GENERATOR
= 75
,
R
LOUT
= 75
for Y and
CVBS outputs and R
LOUT
= 150
for G output, unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DCIN
DC Input Level, Bottom Clamp input
Bottom level, Y and CVBS inputs
2
V
I
CLAMP
Clamping Current, Bottom Clamp
input
at V
DCIN
- 400 mV
1
2
mA
I
LEAK
Input Leakage Current, Bottom Clamp
input
V
IN
= V
DCIN
+1 V
1
10
μA
C
IN
Input Capacitance
2
pF
V
IN
Maximum Input Signal
V
CCV
= 5 V
1.5
V
PP
DYN
Dynamic Output Signal
V
CCV
= 5 V
3
V
PP
YF1
-1 dB Bandwidth (Flatness) of Y and
CVBS
1H signal
4.0
4.5
MHz
YF3
-3 dB Bandwidth of Y and CVBS
1H signal
7
MHz
YSBR
Stopband Rejection
27 MHz versus 100 kHz
- 40
dB
Flatness
Spread of Gain in Video Bands
V
IN
= 1 V
PP,
Band = 15 kHz to
5 MHz for Y and CVBS
±0.5
dB
VCTo
Crosstalk Isolation of Y (or CVBS)
from C and RGB channels
V
IN
= 0.5 V
PP
at f = 3.58 MHz, on
either CIN_ENC, RIN_ENC,
BIN_ENC or GIN_ENC inputs,
R
LOAD
= 150
55
dB
R
OUT
Output Resistance
5
10
GY
Gain on Y and CVBS channels
V
IN
= 1 V
PP
at f = 1 MHz
5.5
6
6.5
dB
DC
YOUT
DC Output Voltage (Y)
Video signal bottom sync pulse at
IC output pins
0.5
V
DC
CVBSOUT
DC Output Voltage (CVBS)
Video signal bottom sync pulse at
IC output pin
1.0
V
DPHI
Differential Phase
V
IN
= 1 V
PP
at f = 3.58 MHz
0.2
3
deg.
DG
Differential Gain
V
IN
= 1 V
PP
at f = 3.58 MHz
0.3
3
%
LNL
Luminance non-linearity
0.5
3
%
VSN7
Video S/N Ratio: Y, C, CVBS and RGB
channels (7 MHz filter)
NTC-7 weighting 4.2 MHz
Lowpass
70
dB
Dtpd7
Group delay variation from flatness
7 MHz filter
20
nS
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