
FUNCTIONAL DESCRIPTION
(continued)
III - VPS DATA
(seeTable 2)
VPSdata are storedin row25 chapter 5 as shown
in Table2 when VPSenable bit(D4 of R8register)
is set. VPS data bits are decoded and stored in a
receivedareawithbiphaseerrorbit.8/30/2dataare
stored as received (without hamming decoding)in
Row23chapter5 accordingtoTable2. 8/30packet
and VPS data decodingis the responsibilityof the
controlsoftware. The decoder simplystores trans-
mitted data.
IV- I
2
C Bus Register Map
(seeTable 3)
Registers R0 to R10 are write only whilst R11Ais
a read/writeand R11B is read only.
The automaticsuccessionon a byte by byte basis
is indicatedby the arrows in Table3.
In the normaloperatingmode TB shouldbe set to
logic level 0.
Table2 :
PDCData Storage in Chapter 5
After power-up the contents of the registersare as
follows: all bitsin registersR0 to R11Aare cleared
to zero with the exception of bits D0 and D1 in
registersR5 and R6 which are set to logicalone.
After power-up all the memory bytes are presetto
hexadecimalvalue20H(space)with the exception
of the byte correspondingto row 0 of column 7 of
chapter 0 which is set to the value corresponding
to “alpha white” hexadecimalvalue 07H.
In 4 pages mode, R1D4 (ghost row enable) is set
to ’0’. In this mode, the X/24, X/26, X/27, X/28
packets of the selected pages,and the 8/30pack-
ets, are not stored.
In 2 pages mode, R1D4 (ghost row enable) is set
’1’. In this mode two displayable pages can be
storedin chapter0and1, andtheghostrowsofthe
selected pages, and the 8/30 packets, are stored
in chapter4 and 5.
Column
8/30/2(Row23)
VPS (Row 25)
0
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Initial Page
Received Page Information
b13 b14 b15 b16 b17 b18 b19 b20 b21 b22 b23 b24 b25
B11
B12
B13
B14
B15
Column
8/30/2(Row23)
VPS (Row 25)
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Status Display
B4
B5
5
D7
D6
D5
D4
D3
D2
D1
D0
X24
POSITION
FREE
RUNNING
PLL
(1)
DISABLE
ROLLING
HEADER
(1)
EVEN
OFF
(1)
SEL 11B
R0
Mode 0
(1)
7 + P/
8 BIT
ACQ.
ON/OFF
GHOST
ROW
ENABLE
DEW/
FULL
FIELD
TCS
ON
T1
T0
R1
Mode 1
(1)
BANK
SELECT
A2
(2)
ACQ.
CCT
A0
TB
START
COLUMN
SC2
START
COLUMN
SC1
START
COLUMN
SC0
R2
Page request address
(1)
(1)
(1)
PRD4
PRD3
PRD2
PRD1
PRD0
R3
Page request data
(1)
(1)
(1)
(1)
(1)
A2
(2)
A0
R4
Display chapter
BKGND
OUT
BKGND
IN
COR
OUT
COR
IN
TEXT
OUT
TEXT
IN
PON
OUT
PON
IN
R5
Display control (normal)
BKGND
OUT
BKGND
IN
COR
OUT
COR
IN
TEXT
OUT
TEXT
IN
PON
OUT
PON
IN
R6
Display control
(newsflash / subtitle)
STATUS
ROW
BTM/TOP
CURSOR
ON/OFF
CONCEAL/
REVEAL
TOP/
BOTTOM
SINGLE/
DOUBLE
HEIGHT
BOX ON
24
BOX ON
1-23
BOX ON
0
R7
Display mode
(1)
(1)
(1)
VPS
ENABLE
CLEAR
MEM.
A2
(2)
A0
R8
Active chapter
(1)
(1)
(1)
R4
R3
R2
R1
R0
R9
Active row
(1)
(1)
C5
C4
C3
C2
C1
C0
R10
Active column
D7
(R/W)
D6
(R/W)
D5
(R/W)
D4
(R/W)
D3
(R/W)
D2
(R/W)
D1
(R/W)
D0
(R/W)
R11A
Active data
60Hz
0
0
0
0
0
DATA
QUAL
V
CS
QUAL
R11B
Status
5
(1) Reservedregister bits : must be set to 0
(2) Inactive
Table3 :
RegisterSpecification
STV5347 - STV5347/H - STV5347/T
9/22