
Pinout and pin descriptions
STV0676
18/21
USB INTERFACE
61
USB_DN
BIDIR
USB data line
62
USB_DP
BIDIR
USB data line
TEST MODE SELECTION
1
TEST_CONF[0]
INPUT
Test configuration bit - connect to VDD for normal operation
2
TEST_CONF[1]
INPUT
Test configuration bit - connect to VDD for normal operation
3
TEST_CONF[2]
INPUT
Test configuration bit - connect to VDD for normal operation
EEPROM INTERFACE
a
63
EEPROM_SDA
BIDIR
Serial data to/from the EEPROM or slave I
2
C clock
64
EEPROM_SCL
BIDIR
Serial clock to the EEPROM or slave I
2
C clock
a. The I
2
C pins EEPROM_SCL and EEPROM_SDA can be reconfigured to act as a low speed I
2
C
slave device that allows the user to directly control the internal register space of the VP and VC
modules.
Table 10: STV0676 pin description
Pin
Signal
Type
Description