參數(shù)資料
型號: STR730FZ2T6
廠商: 意法半導體
英文描述: ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces
中文描述: ARM7TDMI的32位微控制器的閃存,3倍的CAN,4個UART,20定時器,ADC和12通信設備。接口
文件頁數(shù): 42/53頁
文件大小: 764K
代理商: STR730FZ2T6
Electrical parameters
STR73xF
42/53
NRSTIN Pin
NRSTIN Pin Input Driver is CMOS. A permanent pull-up is present which is the same as
R
PU
(see
: General Characteristics on page 39
)
Subject to general operating conditions for
V
DD
and T
A
unless otherwise specified.
Table 23.
Notes:
1.
Data based on characterization results, not tested in production.
2.
Hysteresis voltage between Schmitt trigger switching levels.
3.
Data guaranteed by design, not tested in production.
Figure 19. Recommended NRSTIN pin
protection
1)
Notes:
1.
The R
PU
pull-up equivalent resistor is based on a resistive transistor.
The reset network protects the device against parasitic resets.
2.
3.
The user must ensure that the level on the NRSTIN pin can go below the V
IL(NRSTIN)
max. level specified in
Table 23
. Otherwise the reset will not be taken into account internally.
Reset pin characteristics
Symbol
Parameter
Conditions
Min
Typ
1)
Max
Unit
V
IL(NRSTIN)
RSTIN Input low level voltage
1)
0.3 V
DD
V
V
IH(NRSTIN)
RSTIN Input high level voltage
1)
0.7 V
DD
V
hys(NRSTIN)
RSTIN Schmitt trigger voltage
hysteresis
2)
800
mV
V
F(RSTINn)
RSTIN Input filtered pulse
3)
500
ns
V
NF(RSTINn)
RSTIN Input not filtered pulse
3)
2
μs
V
RP(RSTINn)
RSTIN removal after Power-up
3)
100
μs
0.01
μ
F
EXTERNAL
RESET
CIRCUIT
Required
STR7X
Filter
R
PU
V
DD
INTERNAL RESET
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