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參數(shù)資料
| 型號： | STP70NF03L |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Niobium Oxide Capacitor; Capacitor Type:Low ESR; Voltage Rating:4VDC; Capacitor Dielectric Material:Niobium Oxide; Capacitance:220uF; Capacitance Tolerance:+/- 20%; ESR:100mohm; Operating Temp. Max:125 C; Operating Temp. Min:-55 C RoHS Compliant: Yes |
| 中文描述： | N溝道30V的- 0.008ohm - 70A條TO-220/I2PAK低柵極電荷STripFET⑩功率MOSFET |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 255K |
| 代理商： | STP70NF03L |
1/9
March 2001
STP70NF03L
STB70NF03L-1
N-CHANNEL 30V - 0.008
- 70A TO-220/I
2
PAK
LOW GATE CHARGE STripFET POWER MOSFET
(1) I
SD
≤
70A, di/dt
≤
290A/μs, V
DD
=24 V ; T
j
≤
T
JMAX.
I
TYPICAL R
DS
(on) = 0.008
I
TYPICAL Q
g
= 35 nC @ 10 V
I
OPTIMAL R
DS
(on) x Q
g
TRADE-OFF
I
CONDUCTION LOSSES REDUCED
I
SWITCHING LOSSES REDUCED
DESCRIPTION
This application specific Power Mosfet is the third
generation of STMicroelectronics unique “Single
Feature Size
”
strip-based process. The result-
ing transistor shows the best trade-off between on-
resistance and gate charge. When used as high
and low side in buck regulators, it gives the best
performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi-
ciency are of paramount importance.
APPLICATIONS
I
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
Drain-source Voltage (V
GS
= 0)
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
V
GS
Gate- source Voltage
I
D
Drain Current (continuos) at T
C
= 25°C
I
D
Drain Current (continuos) at T
C
= 100°C
I
DM
(
G
)
Drain Current (pulsed)
P
TOT
Total Dissipation at T
C
= 25°C
Derating Factor
dv/dt (1)
Peak Diode Recovery voltage slope
T
stg
Storage Temperature
T
j
Max. Operating Junction Temperature
(
G
) Pulse width limited by safe operating area
TYPE
V
DSS
R
DS(on)
I
D
STP70NF03L
STB70NF03L-1
30 V
30 V
< 0.01
< 0.01
70 A
70 A
Parameter
Value
Unit
30
V
30
V
± 15
V
70
A
50
A
280
A
100
W
0.67
4
W/°C
V/ns
–65 to 175
°C
175
°C
TO-220
1
2
3
123
I
2
PAK
INTERNAL SCHEMATIC DIAGRAM
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