參數(shù)資料
型號: STM6822SAWY6E
廠商: 意法半導(dǎo)體
英文描述: 5-pin Supervisor with watchdog timer and push-button reset
中文描述: 5引腳看門狗定時器和按鈕復(fù)位監(jiān)
文件頁數(shù): 10/26頁
文件大?。?/td> 149K
代理商: STM6822SAWY6E
Operation
STM6321/6322STM6821/6822/6823/6824/6825
10/26
2
Operation
2.1
Reset output
The STM6xxx Supervisor asserts a reset signal to the MCU whenever V
CC
goes below the
reset threshold (V
RST
), a watchdog time-out occurs, or when the Push-button Reset Input
(MR) is taken low. Reset is guaranteed valid for V
CC
< V
RST
down to V
CC
=1V for T
A
= 0°C
to 85°C.
During power-up, once V
CC
exceeds the reset threshold an internal timer keeps reset low
for the reset time-out period, t
rec
. After this interval reset is de-asserted.
Each time RST is asserted, it stays low for at least the reset time-out period (t
rec
). Any time
V
CC
goes below the reset threshold the internal timer clears. The reset timer starts when
V
CC
returns above the reset threshold.
2.2
Open drain RST output
The STM6321/6322/6822 have an active-low, open drain reset output. This output structure
will sink current when RST is asserted. Connect a pull-up resistor from RST to any supply
voltage up to 6V (see
Figure 11
). Select a resistor value large enough to register a logic low,
and small enough to register a logic high while supplying all input current and leakage paths
connected to the reset output line. A 10k
Ω
pull-up resistor is sufficient in most applications.
Figure 11.
STM6321/6322/6822 open drain RST output with multiple supplies
1.
2.
3.
STM6322/6822
STM6321/6822
STM6321/6322
AI09137
STM6XXX
RST
MR
(1)
WDI
(2)
RST
(3)
GND
10k
V
CC
5V System
5.0V
3.3V
相關(guān)PDF資料
PDF描述
STM6822SAWY6F 5-pin Supervisor with watchdog timer and push-button reset
STM6822SJWY6E 5-pin Supervisor with watchdog timer and push-button reset
STM6822SJWY6F 5-pin Supervisor with watchdog timer and push-button reset
STM6822TAWY6E 5-pin Supervisor with watchdog timer and push-button reset
STM6822TAWY6F 5-pin Supervisor with watchdog timer and push-button reset
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