參數(shù)資料
型號: STM6719TIWB6E
廠商: STMICROELECTRONICS
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
封裝: LEAD FREE, MO-178CAA, SOT-23, 6 PIN
文件頁數(shù): 2/29頁
文件大?。?/td> 246K
代理商: STM6719TIWB6E
Operation
STM6717/6718/6719/6720/STM6777/6778/6779/6780
Operation
Applications Information
1.
Interfacing to Processors with Bi-directional Reset Pins
Most processors with bi-directional reset pins can interface directly to the open drain
RST outputs (STM6717/19/77/79). Systems simultaneously requiring a push-pull RST
output and a bi-directional reset interface can be in logic contention. To prevent this
contention, connect a 4.7k
Ω resistor between RST and the processor’s Reset I/O as
shown in Figure 11.
2.
Ensuring a Valid RST Output Down to VCC =0V
The STM67xx Supervisors are guaranteed to be in the correct RST output logic state
when VCC1 and/or VCC2 is greater than 0.8V. In applications which require valid reset
levels down to VCC = 0, a pull-down resistor to active-low outputs (push-pull only, see
Figure 12) will ensure that the reset line is valid while the reset output can no longer
sink or source current. This scheme does NOT work with the open drain outputs of the
STM6717/19/77/79.
The resistor value used is not critical, but it must be large enough not to load the reset
output when VCC is above the reset threshold. For most applications, 100kΩ is
adequate.
Figure 11.
STM67xx interface to processor with bi-directional reset pins
Figure 12.
Ensuring RST valid to VCC = 0 (active-low, push-pull outputs)
AI10425
VCC1
VCC2
VSS
VCC1
STM67xx
RST
To other
system
components
4.7k
Ω
VCC2
VSS
Processor
RESET
AI10426
VCC1
VSS
STM67xx
RST
R1
相關PDF資料
PDF描述
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相關代理商/技術參數(shù)
參數(shù)描述
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