參數(shù)資料
型號: STM6719
廠商: 意法半導體
英文描述: Dual/Triple Ultra-Low Voltage Supervisors with Push-Button Reset (with Delay Option)
中文描述: 雙/三超低電壓的推監(jiān)控,復位按鈕(帶有延遲期權(quán))
文件頁數(shù): 17/25頁
文件大?。?/td> 129K
代理商: STM6719
17/25
STM6717/6718/6719/6720/6777/6778/6779*/6780*
Table 6. DC and AC Characteristics
Sym
Alter-
native
Description
Test Condition
(1)
Min
Typ
Max
Unit
V
CC
Operating Voltage
0.8
5.5
V
I
CC1
V
CC1
Supply Current
V
CC1
< 5.5V, all I/O pins open
12
35
μA
V
CC1
< 3.6V, all I/O pins open
8
23
μA
I
CC2
V
CC2
Supply Current
V
CC2
< 3.6V, all I/O pins open
3
9
μA
V
CC2
< 2.75V, all I/O pins open
2.5
7
μA
I
LI(2)
Input Leakage Current
0V = V
IN
= V
CC
–1
+1
μA
I
LO
Open Drain RST Output
Leakage Current
V
CC1
> V
RST1
, V
CC2
> V
RST2
;
RST not asserted
0.5
μA
V
OL
Output Low Voltage (RST;
Push-pull or Open Drain)
V
CC1
or V
CC2
0.8V,
I
SINK
= 1μA, RST asserted
0.3
V
V
CC1
or V
CC2
1.0V,
I
SINK
= 50μA, RST asserted
0.3
V
V
CC1
or V
CC2
1.2V,
I
SINK
= 100μA, RST asserted
0.3
V
V
CC1
or V
CC2
2.7V,
I
SINK
= 1.2mA, RST asserted
0.3
V
V
CC1
or V
CC2
4.5V,
I
SINK
= 3.2mA, RST asserted
0.4
V
V
OH
Output High Voltage
(RST; Push-pull only)
V
CC1
1.8V, I
SOURCE
= 200μA,
RST not asserted
0.8V
CC1
V
V
CC1
2.7V, I
SOURCE
= 500μA,
RST not asserted
0.8V
CC1
V
V
CC1
4.5V, I
SOURCE
= 800μA,
RST not asserted
0.8V
CC1
V
t
R(3)
Push-pull RST Rise Time
(STM6718/20/78/80)
Rise time measured from 10%
to 90% of V
CC
;
C
L
= 5pF, V
CC
= 3.3V
5
25
ns
Reset Thresholds
V
RST1(4)
V
TH1
V
CC1
Reset Threshold
L (falling)
4.500
4.625
4.750
V
M (falling)
4.250
4.375
4.500
V
T (falling)
3.000
3.075
3.150
V
S (falling)
2.850
2.925
3.000
V
R (falling)
2.550
2.625
2.700
V
Z (falling)
2.250
2.313
2.375
V
Y (falling)
2.125
2.188
2.250
V
W (falling)
1.620
1.665
1.710
V
V (falling)
1.530
1.575
1.620
V
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