參數(shù)資料
型號: STM1403CRN-Q6F
廠商: 意法半導(dǎo)體
英文描述: 3V FIPS-140 Security Supervisor with Battery Switchover
中文描述: 3V的FIPS - 140安全監(jiān)控的電池切換
文件頁數(shù): 5/9頁
文件大?。?/td> 162K
代理商: STM1403CRN-Q6F
5/9
STM1403
TAMPER DETECTION
Physical
There are four (4) high-impedance physical
tamper detect input pins, 2 normally set to High
(NH) and 2 normally set to Low (NL). Each input is
designed with a glitch immunity. These inputs can
be connected externally to several types of actua-
tor devices (e.g., switches, wire mesh). A tamper
on any one of the four inputs that causes its state
to change will trigger the security alarm (SAL) and
drive it to active-low. Once the tamper condition no
longer exists, the SAL will return to its normal High
state.
TP
1
and TP
3
are set Normally to High (NH). They
are connected externally through a closed switch
or a high-impedance resistor to V
OUT
(in the case
of STM1403A) or V
TPU
(in the case of STM1403B/
C), A tamper condition will be detected when the
input pin is pulled low. If not used, tie the pin to
V
OUT
or V
TPU
.
TP
2
and TP
4
are set Normally to Low (NL). They
are connected externally through a high-imped-
ance resistor or a closed switch to V
SS
. A tamper
condition will be detected when the input pin is
pulled high. If not used, tie the pin to V
SS
.
Supply Voltage
The internally switched supply voltage, V
INT
(ei-
ther V
CC
input or V
BAT
input) is continuously mon-
itored. If V
INT
should exceed the over voltage trip
point, V
HV
(set at 4.2V, typical), or should go below
the under voltage trip point, V
LV
(set at 2.0v, typi-
cal). SAL will be driven active-low. Once the
tamper condition no longer exists, the SAL pin will
return to its normal High state.
When no tamper condition exists, SAL is normally
High.
When a tamper is detected, the SAL is activated
(driven low), independent of the part type. V
OUT
can be driven to one of three states, depending on
which variant of STM1403 is being used (see
De-
vice Options, page 1
):
ON;
High-Z; or
Ground (V
SS
).
Note:
The STM1403 must be initially powered
above V
RST
to enable the tamper detection
alarms. For example, if the battery is on while V
CC
= 0V, no alarm condition can be detected until V
CC
rises above V
RST
(and t
rec
expires). From this
point on, alarms can be detected either on battery
or V
CC
. This is done to avoid false alarms when
the device goes from no power to its operational
state.
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