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參數(shù)資料
| 型號： | STK391-020 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 2-Channel Convergence Correction Circuit (IC max = 6A)(2通道覆蓋校正電路) |
| 中文描述： | 2通道收斂校正電路（集成電路最大\u003d 6A）條（2通道覆蓋校正電路） |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 103K |
| 代理商： | STK391-020 |
STK391-020
No.5169–4/6
Maximum Ratings
Tj max, Tc max,
θ
j-c
The heatsink design is determined by the maximum rat-
ings of several key parameters–Tj max, Tc max and
θ
j-c.
Tj max (junction temperature)
Tj max is dependent on the physical structure of each func-
tional element. A junction temperature exceeding this rat-
ing can lead to device deterioration and breakdown, so
the design must not exceed this rating.
Tc max (operating substrate temperature)
Tc max is dependent on the materials used within an ele-
ment and on the circuit design, and should be selected on
the basis of reliability. Operation exceeding this value is
not guaranteed.
θ
j-c (thermal resistance)
θ
j-c is dependent on the heatsink design, which can vary
greatly. the heatsink necessary is determined by calcula-
tion using the maximum rating for Tj.
As Tj and Tc operating conditions are independent, the
heatsink must be designed to satisfy the maximum ratings
for both parameters.
Heatsink Design Considerations
In the expressions below Pd represents the operating IC
substrate internal power dissipation and Pc represents the
power dissipation per transistor. The heatsink thermal re-
sistance,
θ
c-a, required to dissipate the total power dissi-
pation, Pd, is determined as follows :
Condition 1: IC substrate temperature not to exceed 105
°
C
Pd
×θ
c-a+Ta<105
°
C (Tc max) ............................(1)
Where Ta is the guaranteed maximum ambient tempera-
ture.
Condition 2: Power transistor junction temperature, Tj, not
to exceed 150
°
C
Pd
×θ
c-a+Pc
×θ
j-c+Ta<150
°
C (Tj max) ..............(2)
Where
θ
j-c is the power transistor thermal resistance per
transistor. Therefore, the heatsink design must satisfy both
these expression.
Design Process
A model circuit for a single channel in the STK319-020 is
shown below.
The power dissipation, Pd, is the sum of channel 1, Pd1,
and channel 2, Pd2, power dissipations.
Pd max=Pd1 max+Pd2 max
Therefore, form equation (1),
θ
c-a<
................................(3)
the necessary heatsink resistance is determined (note that
Tc max=105
°
C)
The power dissipation per power transistor per channel, Pc,
is related to the transistor junction temperature by the fol-
lowing equation.
Tj=Pd max
×θ
c-a+Ta+Pc
×θ
j-c ............................(4)
where Tj cannot exceed Tj max=105
°
C. Therfore, in order
to maintain Tj below 150
°
C, a lower heatsink thermal re-
sistance,
θ
c-a, is necessary to lower Tc.
Heatsink Design Example
This example assumes the following worst-case conditions–
V
CC
H=
±
35V, V
CC
L=
±
25V, output coil L
Y
=80
μ
H and
R
Y
=0
, current detector resistance R
NF
=4.7
, Ip-o
max=0.6Ap-o (Ip-o (Ip-p=1.2A) sawtooth wave input, Io
(DC) max=0.6A DC input, both chanels operating, Ta
max=60
°
C (guaranteed maximum).
The channel1 power dissipation, Pd1, is given from Fig-
ures 1 and 2.
Pd1 max=7.0W (AC) with sawtooth wave input
Pd1 max=13.2W (DC) with DC input
As Pd1 max (AC) < Pd1 max (DC), the power dissipation
is greater with DC input. Also, lokking at the output tran-
sistor dissipation, Pc,
Pc=0.5Pd1 with sawtooth wave input
Pc=Pd1 with DC input (one side transistor continuously
ON)
the power dissipation is also higher with DC input. Ac-
cordingly, the heatsink design example below assumes DC
input. The power dissipation in the predriver stage is ig-
nored.
As Pd1 max=Pd2 max+13.2W, Pd max (both channels) is
given by.
Pd max=Pd1 max+Pd2 max=26.4W
From equation (3) with Ta=60
°
C,
θ
c-a=
=
=........ 1.70
°
C/W
For a 2mm aluminum heatsink with no surface coating, the
necessary surface area, S, is given from Figure 3.
S=780cm
2
(28cm
×
28cm)
Tc max – Ta max
Pd max
Tc max – Ta
Pd max
105–60
26.4
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