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參數(shù)資料
| 型號(hào)： | STK25C48-W35I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2K X 8 AUTOSTORE NVSRAM |
| 中文描述： | 2K × 8自動(dòng)存儲(chǔ)非易失性SRAM |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 129K |
| 代理商： | STK25C48-W35I |
STK25CA8
August 1999
6-4
SRAM WRITE CYCLES #1 & #2
(V
CC
= 5.0V
±
10%)
Note i:
Note j:
If W is low when E goes low, the outputs remain in the high-impedance state.
E or W must be
≥
V
IH
during address transitions.
SRAM WRITE CYCLE #1
: W Controlled
j
SRAM WRITE CYCLE #2
: E Controlled
j
NO.
SYMBOLS
PARAMETER
STK25CA8-35
STK25CA8-45
UNITS
#1
#2
Alt.
MIN
MAX
MIN
MAX
12
t
AVAV
t
AVAV
t
WC
Write Cycle Time
35
45
ns
13
t
WLWH
t
WLEH
t
WP
Write Pulse Width
25
30
ns
14
t
ELWH
t
ELEH
t
CW
Chip Enable to End of Write
25
30
ns
15
t
DVWH
t
DVEH
t
DW
Data Set-up to End of Write
12
15
ns
16
t
WHDX
t
EHDX
t
DH
Data Hold after End of Write
0
0
ns
17
t
AVWH
t
AVEH
t
AW
Address Set-up to End of Write
25
30
ns
18
t
AVWL
t
AVEL
t
AS
Address Set-up to Start of Write
0
0
ns
19
t
WHAX
t
EHAX
t
WR
Address Hold after End of Write
0
0
ns
20
t
WLQZ
h, i
t
WZ
Write Enable to Output Disable
13
15
ns
21
t
WHQX
t
OW
Output Active after End of Write
5
5
ns
PREVIOUS DATA
DATA OUT
E
ADDRESS
12
t
AVAV
W
16
t
WHDX
DATA IN
19
t
WHAX
13
t
WLWH
18
t
AVWL
17
t
AVWH
DATA VALID
20
t
WLQZ
15
t
DVWH
HIGH IMPEDANCE
21
t
WHQX
14
t
ELWH
DATA OUT
E
ADDRESS
12
t
AVAV
W
DATA IN
13
t
WLEH
17
t
AVEH
DATA VALID
HIGH IMPEDANCE
14
t
ELEH
18
t
AVEL
15
t
DVEH
19
t
EHAX
16
t
EHDX
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STK25C48-W45 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2K X 8 AUTOSTORE NVSRAM |
| STK25C48-W45I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2K X 8 AUTOSTORE NVSRAM |
| STK25CA8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128K x 8 AutoStore nvSRAM CMOS Nonvolatile Static RAM Module |
| STK25CA8-D35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128K x 8 AutoStore nvSRAM CMOS Nonvolatile Static RAM Module |
| STK25CA8-D35I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128K x 8 AutoStore nvSRAM CMOS Nonvolatile Static RAM Module |
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