參數(shù)資料
型號: STK14C88-5L35M
廠商: Electronic Theatre Controls, Inc.
英文描述: 32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
中文描述: 32K的× 8自動存儲非易失量子端粒酶的CMOS非易失靜態(tài)RAM
文件頁數(shù): 2/12頁
文件大?。?/td> 85K
代理商: STK14C88-5L35M
STK14C88-M
April 1999
5-44
ABSOLUTE MAXIMUM RATINGS
a
Voltage on Input Relative to V
SS
. . . . . . . . . .–0.6V to (V
CC
+ 0.5V)
Voltage on DQ
or HSB . . . . . . . . . . . . . . . .–0.5V to (V
+ 0.5V)
Temperature under Bias. . . . . . . . . . . . . . . . . . . . . –55
°
C to 125
°
C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65
°
C to 150
°
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . 15mA
DC CHARACTERISTICS
Note a:
Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at con-
ditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
(V
CC
= 5.0V
±
10%)
e
Note b:
Note c:
Note d:
Note e:
I
CC1
and I
CC3
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
I
CC2
and I
are the average currents required for the duration of the respective
STORE
cycles (t
STORE
).
E
V
will not produce standby current levels until any nonvolatile cycle in progress has timed out.
V
reference levels throughout this datasheet refer to V
CCX
if that is where the power supply connection is made, or V
CAP
if V
CCX
is con-
nected to ground.
SYMBOL
PARAMETER
MILITARY
UNITS
NOTES
MIN
MAX
I
CC1
b
Average V
CC
Current
90
85
mA
mA
t
AVAV
= 35ns
t
AVAV
= 45ns
I
CC2
I
CC3
c
Average V
CC
Current during STORE
6
mA
All Inputs Don’t Care, V
CC
= max
b
Average V
CC
Current at t
AVAV
= 200ns
15
mA
W
(V
CC
– 0.2V)
All Others Cycling, CMOS Levels
I
CC4
c
Average V
CAP
Current during AutoStore
Cycle
4
mA
All Inputs Don’t Care
I
SB1
d
Average V
CC
Current
(Standby, Cycling TTL Input Levels)
30
28
mA
mA
t
AVAV
= 35ns, E
V
IH
t
AVAV
= 45ns, E
V
IH
I
SB2
d
V
CC
Standby Current
(Standby, Stable CMOS Input Levels)
3
mA
E
(V
CC
– 0.2V)
All Others V
IN
0.2V or
(V
CC
– 0.2V)
I
ILK
Input Leakage Current
±
1
μ
A
V
CC
= max
V
IN
= V
SS
to V
CC
I
OLK
Off-State Output Leakage Current
±
5
μ
A
V
CC
= max
V
IN
= V
SS
to V
CC
, E or G
V
IH
V
IH
Input Logic “1” Voltage
2.2
V
CC
+ .5
V
All Inputs
V
IL
Input Logic “0” Voltage
V
SS
– .5
0.8
V
All Inputs
V
OH
Output Logic “1” Voltage
2.4
V
I
OUT
=–4mA except HSB
V
OL
Output Logic “0” Voltage
0.4
V
I
OUT
= 8mA except HSB
V
BL
Logic “0” Voltage on HSB Output
0.4
V
I
OUT
= 3mA
T
A
Operating Temperature
–55
125
°
C
AC TEST CONDITIONS
CAPACITANCE
f
(T
A
= 25
°
C, f = 1.0MHz)
Note f:
These parameters are guaranteed but not tested.
Input Pulse Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 3V
Input Rise and Fall Times
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .≤
5ns
Input and Output Timing Reference Levels. . . . . . . . . . . . . . . .1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
SYMBOL
PARAMETER
MAX
UNITS
CONDITIONS
C
IN
Input Capacitance
5
pF
V = 0 to 3V
C
OUT
Output Capacitance
7
pF
V = 0 to 3V
Figure 1: AC Output Loading
480 Ohms
30 pF
INCLUDING
SCOPE
AND FIXTURE
255 Ohms
5.0V
OUTPUT
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