參數(shù)資料
型號(hào): STK14C88-5K35M
廠商: Electronic Theatre Controls, Inc.
英文描述: 32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
中文描述: 32K的× 8自動(dòng)存儲(chǔ)非易失量子端粒酶的CMOS非易失靜態(tài)RAM
文件頁(yè)數(shù): 4/12頁(yè)
文件大?。?/td> 85K
代理商: STK14C88-5K35M
STK14C88-M
April 1999
5-46
SRAM WRITE CYCLES #1 & #2
(V
CC
= 5.0V
±
10%)
e
Note j:
Note k:
Note l:
If W is low when E goes low, the outputs remain in the high-impedance state.
E or W must be
V
during address transitions.
HSB must be high during SRAM WRITE cycles.
SRAM WRITE CYCLE #1
: W Controlled
k, l
SRAM WRITE CYCLE #2
: E Controlled
k, l
NO.
SYMBOLS
PARAMETER
STK14C88-35M
STK14C88-45M
UNITS
#1
#2
Alt.
MIN
MAX
MIN
MAX
12
t
AVAV
t
AVAV
t
WC
Write Cycle Time
35
45
ns
13
t
WLWH
t
WLEH
t
WP
Write Pulse Width
25
30
ns
14
t
ELWH
t
ELEH
t
CW
Chip Enable to End of Write
25
30
ns
15
t
DVWH
t
DVEH
t
DW
Data Set-up to End of Write
12
15
ns
16
t
WHDX
t
EHDX
t
DH
Data Hold after End of Write
0
0
ns
17
t
AVWH
t
AVEH
t
AW
Address Set-up to End of Write
25
30
ns
18
t
AVWL
t
AVEL
t
AS
Address Set-up to Start of Write
0
0
ns
19
t
WHAX
t
EHAX
t
WR
Address Hold after End of Write
0
0
ns
20
t
WLQZi, j
t
WZ
Write Enable to Output Disable
13
15
ns
21
t
WHQX
t
OW
Output Active after End of Write
5
5
ns
E
PREVIOUS DATA
DATA OUT
ADDRESS
12
t
AVAV
W
16
t
WHDX
DATA IN
19
t
WHAX
13
t
WLWH
18
t
AVWL
17
t
AVWH
DATA VALID
20
t
WLQZ
15
t
DVWH
HIGH IMPEDANCE
21
t
WHQX
14
t
ELWH
DATA OUT
E
ADDRESS
12
t
AVAV
W
16
t
EHDX
DATA IN
13
t
WLEH
19
t
EHAX
18
t
AVEL
17
t
AVEH
DATA VALID
15
t
DVEH
HIGH IMPEDANCE
14
t
ELEH
相關(guān)PDF資料
PDF描述
STK14C88-5K45M 32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
STK14C88-5L35M 32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
STK14C88-5L45M 32K x 8 AUTOSTORE nvSRAM QUANTUM TRAP CMOS NONVOLATILE STATIC RAM
STK15C88 HEATSINK TO-218 10W H=2.5 BLK
STK15C88-N25 HEATSINK TO-218 10W H=2.5 BLK
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