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參數(shù)資料
| 型號： | STC62WV256DI |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | VERY LOW POWER/VOLTAGE CMOS SRAM |
| 中文描述： | 低功率/電壓的CMOS的SRAM |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 385K |
| 代理商： | STC62WV256DI |
Revision 2.3
Jan.
2004
4
JEDEC
PARAMETER
NAME
t
AVAX
t
AVQV
t
ELQV
t
GLQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
AXOX
PARAMETER
NAME
t
RC
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
t
OH
DESCRIPTION
CYCLE TIME : 70ns
MIN. TYP. MAX.
UNIT
Read Cycle Time
70
--
--
ns
Address Access Time
--
--
70
ns
ns
Chip Select Access Time
--
--
70
Output Enable to Output Valid
--
--
50
ns
Chip Select to Output Low Z
10
--
--
ns
Output Enable to Output in Low Z
10
--
--
ns
Chip Deselect to Output in High Z
--
--
35
ns
Output Disable to Output in High Z
--
--
30
ns
Data Hold from Address Change
10
--
--
ns
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
1V/ns
0.5Vcc
AC TEST LOADS AND WAVEFORMS
AC ELECTRICAL CHARACTERISTICS
( TA =0
o
C to + 70
o
C and Vcc=3.0V)
READ CYCLE
AC TEST CONDITIONS
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”O(jiān)FF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
STC
STC62WV256
R0201-
STC62WV256
667
THEVENIN EQUIVALENT
ALL INPUT PULSES
→
10%
←
90%
Vcc
GND
→
←
5ns
90%
10%
1.73V
OUTPUT
FIGURE 2
3.3V
OUTPUT
INCLUDING
JIG AND
SCOPE
1269
1404
5PF
FIGURE 1B
3.3V
INCLUDING
JIG AND
SCOPE
1269
100PF
FIGURE 1A
1404
OUTPUT
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| STC62WV256JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VERY LOW POWER/VOLTAGE CMOS SRAM |
| STC62WV256JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VERY LOW POWER/VOLTAGE CMOS SRAM |
| STC62WV256PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VERY LOW POWER/VOLTAGE CMOS SRAM |
| STC62WV256PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VERY LOW POWER/VOLTAGE CMOS SRAM |
| STC62WV256SC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VERY LOW POWER/VOLTAGE CMOS SRAM |
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