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參數(shù)資料
| 型號： | STA530 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 音頻放大器 |
| 英文描述： | 4 X 50W STEREO BASH POWER AMPLIFIER |
| 中文描述： | 4 × 50瓦立體聲BASH功放 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 278K |
| 代理商： | STA530 |
STA530
8/17
OUTPUT BRIDGE
The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one in non-inverting configuration with gain equal to 10 and the other in inverting configuration
with unity gain. To guarantee the high input impedance at the input pins, PWR_Inp1....4, the second amplifier
stages are driven by the output of the first stages respectively.
In 60W x2 channel configuration the "slave" inputs (INPUT 2/4) must be connected to GND.
POWER PROTECTION
To protect the output transistors of the power bridge a power detector is implemented (fig 1).
The current flowing in the power bridge and the voltage drop on the relevant power (Vds) are internally mea-
sured. These two parameters are converted in current and multiplied: the resulting current , Ipd, is proportional
to the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the
reference current Ipda, if bigger (dissipated power > 18W) a current, Iprot(P
D
), is supplied to the Protection pin.
The aim of the current Iprot is to reduce the reference voltage for the Buck regulator supplying the power stage
of the chip, and than to reduce the dissipated power. The response time of the system must be less than
200
μ
Sec to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the
dissipated value is higher then 30W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on se-
quence is restarted. The above description is relative for each channel in 4x30W configuration.
Figure 1. Power Protection Block Diagram
+
+
x
OPA
OUT1p
ILIMP
I_Pd
I_pda
I_pdp
I_pd
Pdp1
Oc1
I_pdI
PROT(PD)
CURRENT
COMP.
TO PROT
PAD
SEQUENCE
TO TURN-ON/OFF
SEQUENCE
TO TURN-ON/OFF
I
PROT
I
PROT(ID)
MULTIPLIER
Iload
CD-1&2
OPA
OUT1n
CD+1&2
R
SENSE
V/I
V/I
Ilim
CURRENT
COMP.
D02AU1346
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