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參數(shù)資料
| 型號： | ST95020 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 2K Serial SPI EEPROM with Positive Clock Strobe(帶正時鐘選通的2K串行SPI EEPROM) |
| 中文描述： | 2K串行SPI EEPROM，帶有正時鐘選通（帶正時鐘選通的2K的SPI串行EEPROM的） |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 108K |
| 代理商： | ST95020 |
Byte Write Operation
Prior to any write attempt, the write enable latch
mustbe setby issuingthe WREN instruction.First
thedeviceis selected(S= low)and aserialWREN
instruction byte is issued. Then the product is de-
selectedby takingS high.Afterthe WREN instruc-
tion byte is sent, the Memory will set the write
enable latch and then remain in standby until it is
deselected. Then the write state is entered by
selecting the chip, issuing two bytes of instruction
and address,and onebyte of data.
Chip Select (S) must remain low for the entire
duration of the operation. The product must be
deselectedjustaftertheeighthbitof datahasbeen
latchedin. If not,the writeprocess is cancelled.As
soon as the product is deselected, the self-timed
writecycleisinitiated.Whilethewrite isin progress,
thestatusregistermaybe readto checkBP1,BP0,
WEL and WIP. WIP is high during the self-timed
writecycle.When the cycle is completed,the write
enable latch is reset.
Page Write Operation
A maximum of 16 bytes of data may be written
during one non-volatile write cycle. All 16 bytes
must reside on the same page. The page write
mode is the same as the byte write mode except
thatinsteadof deselectingthe deviceafter the first
byteofdata, upto15additionalbytescanbeshifted
in prior to deselecting the chip. A page address
beginswith addressxxxx 0000 and endswith xxxx
1111.If theaddresscounterreachesxxxx1111and
theclockcontinues,the counterwill roll overto the
firstaddressof thepage(xxxx0000)and overwrite
any previously written data. The programming cy-
clewill onlystartif the S transitionoccurs justafter
the eighth bit of data of a wordis received.
POWER ON STATE
After a Power up the Memory is in the following
state:
– The device is in thelow power standbystate.
– The chip is deselected.
– The chip is not in hold condition.
– The write enablelatch is reset.
– BP1 and BP0 are unchanged(non-volatile
bits).
C
D
AI01445
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
HIGH IMPEDANCE
INSTRUCTION
STATUS REG.
0
Figure 11. WRSR: Write Status Register Sequence
9/18
ST95040, ST95020, ST95010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST95020B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPI Serial EEPROM |
| ST95020B1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4K/2K/1K Serial SPI EEPROM with Positive Clock Strobe |
| ST95020B3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPI Serial EEPROM |
| ST95020B3TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4K/2K/1K Serial SPI EEPROM with Positive Clock Strobe |
| ST95020B6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPI Serial EEPROM |
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