參數(shù)資料
型號(hào): ST95010
廠(chǎng)商: 意法半導(dǎo)體
元件分類(lèi): DRAM
英文描述: 1K Serial SPI EEPROM with Positive Clock Strobe(帶正時(shí)鐘選通的1K串行SPI EEPROM)
中文描述: 一千串行SPI EEPROM,帶有正時(shí)鐘選通(帶正時(shí)鐘選通的每1000的SPI串行EEPROM的)
文件頁(yè)數(shù): 3/18頁(yè)
文件大?。?/td> 108K
代理商: ST95010
AI01438
C
C
MSB
LSB
CPHA
D or Q
0
1
CPOL
0
1
Figure 3. Data and Clock Timing
AI01439B
SPI Interface with
(CPOL, CPHA) =
(’0’, ’0’) or (’1’, ’1’)
MICROCONTROLLER
(ST6, ST7, ST9, ST10, OTHERS)
ST95xx0
SCK
SDI
SDO
C
Q
D
Figure 4. Microcontrollerand SPI Interface Set-up
Serial Clock (C).
The serial clock provides the
timing of the serial interface. Instructions, ad-
dresses,ordatapresentat theinputpinarelatched
on the rising edge of the clockinput, while data on
theQ pinchangesafterthe fallingedgeof theclock
input.
Chip Select (S).
When S is high, the Memory is
deselectedand the Q output pin is at high imped-
ance and, unless an internal write operation is
underwaythe Memorywill be in thestandbypower
mode. S low enables the Memory, placingit in the
active power mode. It should be noted that after
power-on, a high to low transitionon S is required
prior to the startof any operation.
Write Protect (W).
This pin is for hardware write
protection. When W is low, writes to the Memory
aredisabledbutanyotheroperationsstayenabled.
WhenWishigh,all writesoperationsareavailable.
W going low at any time before the last bit D0 of
thedata streamwillresetthewriteenablelatchand
prevent programming. No action on W or on the
writeenable latchcan interrupta write cycle which
has commenced.
3/18
ST95040, ST95020, ST95010
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