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10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
REGISTER DESCRIPTION
(Cont’d)
CHANNEL 4 DATA HIGH REGISTER (D4HR)
R248 - Read/Write
Register Page: 61
Reset Value: undefined
Bits 7:0 =
D4.[9:2]
:
Channel 4 9:2 bit Data
CHANNEL 4 DATA LOW REGISTER (D4LR)
R249 - Read/Write
Register Page: 61
Reset Value: xx00 0000
Bits 7:6 =
D4.[1:0]
:
Channel 4 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL 5 DATA HIGH REGISTER (D5HR)
R250 - Read/Write
Register Page: 61
Reset Value: undefined
Bits 7:0 =
D5.[9:2]
:
Channel 5 9:2 bit Data
CHANNEL 5 DATA LOW REGISTER (D5LR)
R251 - Read/Write
Register Page: 61
Reset Value: xx00 0000
Bits 7:0 =
D1.[1:0]
:
Channel 5 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL 6 DATA HIGH REGISTER (D6HR)
R252 - Read/Write
Register Page: 61
Reset Value: undefined
Bits 7:0 =
D6.[9:2]
:
Channel 6 9:2 bit Data
CHANNEL 6 DATA LOW REGISTER (D6LR)
R253 - Read/Write
Register Page: 61
Reset Value: xx00 0000
Bits 7:0 =
D6.[1:0]
:
Channel 6 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL 7 DATA HIGH REGISTER (D7HR)
R254 - Read/Write
Register Page: 61
Reset Value: undefined
Bits 7:0 =
D7.[9:2]
:
Channel 7 9:2 bit Data
CHANNEL 7 DATA LOW REGISTER (D7LR)
R255- Read/Write
Register Page: 61
Reset Value: xx00 0000
Bits 7:0 =
D7.[1:0]
:
Channel 7 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
7
0
D4.9
D4.8
D4.7
D4.6
D4.5
D4.4
D4.3
D4.2
7
0
D4.1
D4.0
0
0
0
0
0
0
7
0
D5.9
D5.8
D5.7
D5.6
D5.5
D5.4
D5.3
D5.2
7
0
D5.1
D5.0
0
0
0
0
0
0
7
0
D6.9
D6.8
D6.7
D6.6
D6.5
D6.4
D6.3
D6.2
7
0
D6.1
D6.0
0
0
0
0
0
0
7
0
D7.9
D7.8
D7.7
D7.6
D7.5
D7.4
D7.3
D7.2
7
0
D7.1
D7.0
0
0
0
0
0
0
9