參數(shù)資料
型號(hào)： ST92124V1TB
廠商： 意法半導(dǎo)體
英文描述： 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
中文描述： 16位產(chǎn)品單電壓閃存MCU的家庭的RAM，EEPROM的E3展TMEMULATED，可以2.0b和J1850 BLPD
文件頁(yè)數(shù)： 328/426頁(yè)
文件大?。?/td> 3831K
代理商： ST92124V1TB
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CONTROLLER AREA NETWORK (bxCAN)
CONTROLLER AREA NETWORK
(Cont’d)
10.10.4.7 Loop Back combined with Silent
Mode
It is also possible to combine Loop Back mode and
Silent mode by setting the LBKM and SILM bits in
the CDGR register. This mode can be used for a
“Hot Selftest”, meaning the bxCAN can be tested
like in Loop Back mode but without affecting a run-
ning CAN system connected to the CANTX
and
CANRX pins. In this mode, the CANRX
pin is dis-
connected from the bxCAN and the CANTX
pin is
held recessive.
Figure 146. bxCAN in Combined Mode
10.10.5 Functional Description
10.10.5.1 Transmission Handling
In order to transmit a message, the application
must select one
empty
transmit mailbox, set up
the identifier, the data length code (DLC) and the
data before requesting the transmission by setting
the corresponding TXRQ bit in the MCSR register.
Once the mailbox has left
empty
state, the soft-
ware no longer has write access to the mailbox
registers. Immediately after the TXRQ bit has
been set, the mailbox enters
pending
state and
waits to become the highest priority mailbox, see
Transmit Priority
. As soon as the mailbox has the
highest priority it will be
scheduled
for transmis-
sion. The transmission of the message of the
scheduled mailbox will start (enter
transmit
state)
when the CAN bus becomes idle. Once the mail-
box has been successfully transmitted, it will be-
come
empty
again. The hardware indicates a suc-
cessful transmission by setting the RQCP and
TXOK bits in the MCSR and CTSR registers.
If the transmission fails, the cause is indicated by
the ALST bit in the MCSR register in case of an Ar-
bitration Lost, and/or the TERR bit, in case of
transmission error detection.
Transmit Priority
By Identifier:
When more than one transmit mailbox is pending,
the transmission order is given by the identifier of
the message stored in the mailbox. The message
with the lowest identifier value has the highest pri-
ority according to the arbitration of the CAN proto-
col. If the identifier values are equal, the lower
mailbox number will be scheduled first.
By Transmit Request Order:
The transmit mailboxes can be configured as a
transmit FIFO by setting the TXFP bit in the CMCR
register. In this mode the priority order is given by
the transmit request order.
This mode is very useful for segmented transmis-
sion.
Abort
A transmission request can be aborted by the user
setting the ABRQ bit in the MCSR register. In
pending
or
scheduled
state, the mailbox is abort-
ed immediately. An abort request while the mail-
box is in
transmit
state can have two results. If the
mailbox is transmitted successfully the mailbox
becomes
empty
with the TXOK bit set in the
MCSR and CTSR registers. If the transmission
fails, the mailbox becomes
scheduled,
the trans-
mission is aborted and becomes
empty
with
TXOK cleared. In all cases the mailbox will be-
come
empty
again at least at the end of the cur-
rent transmission.
Non-Automatic Retransmission Mode
This mode has been implemented in order to fulfil
the requirement of the Time Triggered Communi-
cation option of the CAN standard. To configure
the hardware in this mode the NART bit in the
CMCR register must be set.
In this mode, each transmission is started only
once. If the first attempt fails, due to an arbitration
loss or an error, the hardware will not automatical-
ly restart the message transmission.
At the end of the first transmission attempt, the
hardware considers the request as completed and
sets the RQCP bit in the MCSR register. The result
of the transmission is indicated in the MCSR regis-
ter by the TXOK, ALST and TERR bits.
bxCAN
CANTX CANRX
Tx
Rx
=1
9
相關(guān)PDF資料
PDF描述
ST92F124V1TB CAP 15000PF 16V CERAMIC 0402 SMD
ST92124V1TC 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92F124V1TC 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92124V2QB 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92F124V2QB CAP .068UF 16V CERAMIC Y5V 0402
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST92124V1TC 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92124V2Q6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92124V2QB 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92124V2QC 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
ST92124V2T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD
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