參數(shù)資料
型號(hào): ST7538
廠商: 意法半導(dǎo)體
英文描述: POWER LINE FSK TRANSCEIVER
中文描述: 電力線FSK收發(fā)器
文件頁數(shù): 18/30頁
文件大?。?/td> 264K
代理商: ST7538
ST7538
18/30
I
Automatic Level Control (ALC)
The Automatic Level Control Block (ALC) is a variable gain amplifier (with 32 non linear discrete steps)
controlled by two analog feed backs acting at the same time. The ALC gain range is 0dB to 30 dB and
the gain change is clocked at 5KHz. Each step increases or reduces the voltage of 1dB (Typ).
Two are the control loops acting to define the ALC gain:
- A Voltage Control loop
- A Current Control Loop
The Voltage control loop acts to keep the Peak-to-Peak Voltage constant on Vsense. The gain
adjustment is related to the result of a peak detection between the Voltage waveform on Vsense and
two internal Voltage references.
- If Vsense < VCL
TH
- VCL
HYST
- If VCL
TH
- VCL
HYST
< Vsense < VCL
TH
+ VCL
HYST
- If Vsense > VCL
TH
+ VLC
HYST
The next gain level is increased by 1 step
No Gain Change
The next gain level is decreased by 1 step
The Current control loop acts to limit the maximum Peak Output current inside ATOP1 and ATOP2.
The current control loop acts through the voltage control loop decreasing the Output Peak-to-Peak
Amplitude to reduce the Current inside the Power Line Interface.
The current sensing is done by mirroring the current in the High side MOS of the Power Amplifier (not
dissipating current Sensing). The Output Current Limit (up to 400mApeak), is set by means of an
external resistor (R
CL
) connected between CL and PAVss. The resistor converts the current sensed into
a voltage signal. The Peak current sensing block works as the Output Voltage sensing Block:
- If V(CL) < CCL
TH
- CCL
HYST
- If CCL
TH
- CCL
HYST
< V(CL) < CCL
TH
+ CCL
HYST
- If V(CL) > CCL
TH
+ CLC
HYST
Voltage Control Loop Acting
No Gain Change
The next gain level is decreased by 1 step
Figure 13 shows the typical connection of Current anVoltage control loops.
Figure 13. Voltage and Current Feedback external interconnection Example
Voltage Control Loop Formula
R1
ALC
VOLTAGE
LOOP
CURRENT
LOOP
Vsense
CL
ATOP/ATO
VR
PK
VCL
HYST
VCL
TH
1.865V (Typ)
CCL
HYST
CCL
TH
AVss
5.6nF
R2
RCL
100pF
Vout
D03IN1421
VR
PK
R
--------------------
R
2
+
R
2
VCL
TH
VCL
HYST
±
(
)
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