參數(shù)資料
型號: ST7536CFN
廠商: 意法半導體
英文描述: POWER LINE MODEM
中文描述: 電力線調(diào)制解調(diào)器
文件頁數(shù): 5/9頁
文件大?。?/td> 100K
代理商: ST7536CFN
2 - Receive Section
The receive section is active when Rx/Tx = 1.
The baud rate and channel selectionis alsomade
accordingto Table 1.
The Rx signal is applied on RAI with a common
mode voltage of 0V and filtered by a band-pass
switched capacitor filter (Rx band-pass) centered
onthereceivedcarrierfrequencyand whoseband-
width is around 6kHz. The input voltage range on
RAI is 2mV
RMS
- 2V
RMS
.
TheRxfilteroutputisamplifiedbya20dBgainstage
whichprovidessymmetricallimitationsforlargevolt-
age. The resulting signal is down-converted by a
mixer which receives a local oscillator synthesized
bytheFSKmodulatorblock.Finallyanintermediate
frequency band-pass filter (IF band-pass) whose
central frequency is 2.7kHz when BRS = 0 and
5.4kHzwhen BRS= 1 improvesthe signaltonoise
ratio before entering the FSK demodulator. The
couplingof theintermediatefrequencyfilter output
(IFO)totheFSKdemodulatorinput(DEMI)ismade
byanexternalcapacitorC5(1
μ
F
±
10%,10V)which
cancelsthe Rx path offsetvoltage.
A clock recovery circuit extracts the receive clock
(CLR/T) from the demodulated output (RxDEM)
and delivers synchronousdata (RxD) on the posi-
tiveedge of CLR/T.
FUNCTIONAL DESCRIPTION
(continued)
3 - Additional Digital and AnalogFunctions
Areset intput (RESET) initializesthe device.
When RESET = 0, the device is in power-down
mode and all the internal logic is reset. When
RESET= 1, the device is active.
Atime base section delivers all the internalclocks
from a crystal oscillator (11.0592MHz).The crystal
is connectedbetweenXTAL1 andXTAL2 pins and
needstwoexternalcapacitorsC3 and C4 depend-
ing on the crystal characteristic typically
22pF
±
10% for properoperation.It isalsopossible
to provide directly the clock on pin XTAL1 ; in this
caseC3 and C4 should be removed.
An Automatic Frequency Control (AFC) Section
adjusts the central frequency of Rx and Tx band-
pass filter to the carrier central frequency. The
stability of the AFC loop is ensuredby an external
compensationnetworkC1(470nF
±
10%,10V), C2
CLR/T
RxD
DATA VALID
7
Figure 3 :
Rx Data Output Timing
(47nF
±
10%,10V)and R1 (1.5k
±
5%) connected
to pin AFCF.
17
C1
C2
R1
AFCF
AGND
22
7
Figure 4 :
AutomaticFrequencyLoop Filter
4 - Testing Features
- Anadditionnalamplifierallowstheobservationof
the Rx band-pass filter output on pin RxFO.
- A direct input to the Tx band-passfilter (TxFI) is
availableand selected when TEST4= 1.
- The 3 second normal duration of the Tx to Rx
mode automaticswitching is reducedto 1.48ms
when TEST2 = 1.
- When TEST1 = 1 the Tx to Rx mode automatic
switchingis desactivatedandthefunctionalmode
ofthecircuitiscontrolledbyRx/Txasfollow:when
Rx/Tx = 0 the circuit is transmitting continuously,
whenRx/Tx= 1theclockrecoveryblockisdiscon-
nectedfrom theFSK demodulatorfor testingpur-
pose,inthisconfigurationTEST3isthedatainput
of theclockrecoveryblock,RxDEMfollowTEST3
andRxD deliverstheresynchronizeddata.
5 - PowerSupplies Wiring and Decoupling
Precautions
The ST7536 has two positive power supply pins,
two negative power supply pins and two ground
pinsinordertoseparateinternalanalog anddigital
supplies.The analog and digital terminals of each
supply pair must be connectedtogetherexternally
and require special routing precautionsin order to
get the best receivesensitivity performances.
The three major routingrequirementsare :
- The ground impedance should be as low as
possible, for this purpose the AGND an DGND
terminals can be connectedvia a localplane.
- The positiveandnegativepowersupplies(AV
DD
,
DV
DD
, AV
SS
, DV
SS
) should be star-connected,
avoidingcommoncurrent pathfor the digitaland
analog power supplies terminals.
- Five decoupling capacitors located as close as
possibleto thepowersupplyterminalsshouldbe
used. Two 2.2
μ
F tantalum and two 100nF ce-
ramic capacitors perform the main decoupling
function in the vicinity of the analog power sup-
pliesanda100nFceramiccapacitorinthevicinity
of the positive digital power supply is used to
reduce the high frequency perturbations gener-
ated by the logic part of the circuit.
ST7536
5/9
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