參數(shù)資料
型號： ST7285C
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES
中文描述： 8位微控制器48,000鐵路發(fā)展策略光盤，3K內(nèi)存，ADC，兩個定時器，2個SPI，I2C和脊髓損傷接口
文件頁數(shù)： 8/117頁
文件大?。?/td> 748K
代理商： ST7285C
8/117
ST7285C
33
34
35
36
37
38
39
40
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
I/O Port PF0
I/O Port PF1
I/O Port PF2
I/O Port PF3
I/O Port PF4
I/O Port PF5
I/O Port PF6
I/O Port PF7
Ground for Output Buff-
ers.
Power Supply for Out-
put Buffers
Reserved
Reserved
I/O Port PG0
I/O Port PG1
I/O Port PG2
-
Software selectable as triggered input, a push
pull output, open drain output, or triggered in-
terrupt input with pull up (Interrupt I2).
-
-
-
-
-
-
-
Software selectable as a triggered input or as
a push pull output.
41
V
SSP
-
This pin is connected to pin 1.
42
V
DDP
-
This pin is connected to pin 2.
43
44
45
46
47
AINT
ARS
PG0
PG1
PG2
-
-
-
-
-
Must be tied to 5V
Must be tied to 5V
Software selectable as triggered input or push
pull output.
48
PG3
I/O Port PG3
-
Software selectable as triggered input, a push
pull output, open drain output, or triggered in-
terrupt input with pull up (Interrupt I1).
49
50
51
52
PG4
PG5
PG6
PG7
PH0/
RDSQUAL
PH1/
RDSCLKOUT
PH2/
RDSDATA
PH3
PH4
PH5
I/O Port PG4
I/O Port PG5
I/O Port PG6
I/O Port PG7
-
-
-
-
Software selectable as triggered input or push
pull output. Note that PH0, 1, 2 offer alternate
function capabilities for test purposes.
53
I/O Port PH0
RDS Quality signal
54
I/O Port PH1
RDS GBS Clock Out
signal
55
I/O Port PH2
RDS GBS Data signal
56
57
58
I/O Port PH3
I/O Port PH4
I/O Port PH5
-
-
-
Software selectable as triggered input or high
voltage (10V max) open drain output.
59
RDSCOMP
RDS Comp Input signal
Used tofeed theDemodulator froman external
filter when the internal filter is switched off.
60
RDSFIL
RDS Filtered Output
signal
RDS Input Reference
RDS input signal
Analog Power Supply
Analog Ground
I/O Port PA0
I/O Port PA1
I/O Port PA2
I/O Port PA3
I/O Port PA4
I/O Port PA5
I/O Port PA6
I/O Port PA7
Used for Demodulator test purposes.
61
62
63
64
65
66
67
68
69
70
71
72
RDSREF
MPX
V
DDA
V
SSA
PA0/AIN0
PA1/AIN1
PA2/AIN2
PA3/AIN3
PA4/AIN4
PA5/AIN5
PA6/AIN6
PA7/AIN7
For RDS and ADC circuits
Analog input to ADC
Alternate function or I/O. The I/O configuration
is software selectable as triggered input or
push pull output. Note that when a pin is used
as Analog input it must notbeconfigured as an
output to avoid conflicts with the analog volt-
age to be measured.
Pin
Pin Name(s)
Basic Function
Alternate Function
Remarks
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