參數(shù)資料
型號(hào): ST63E69D1
廠商: 意法半導(dǎo)體
英文描述: 8-BIT HCMOS MCU FOR DIGITAL CONTROLLED MULTI FREQUENCYMONITOR
中文描述: 8位HCMOS單片機(jī)的數(shù)控多FREQUENCYMONITOR
文件頁(yè)數(shù): 11/71頁(yè)
文件大?。?/td> 584K
代理商: ST63E69D1
ST6369 CORE
(Continued)
Indirect Registers (X,Y).
These two indirect reg-
istersare usedaspointerstothe memorylocations
in the dataspace. They are used in theregister-in-
direct addressing mode.These registers can be
addressed in the data space as RAM locations at
the 80H(X) and 81H (Y) addresses.They can also
be accessed with the direct, short direct, or bit di-
rect addressing modes. Accordingly, the ST638x
instructionsetcan use theindirectregistersas any
other registerof the data space.
Short Direct Registers (V, W).
These two regis-
ters are used to save one byte in short direct ad-
dressing mode.These registerscan be addressed
in the data space as RAM locationsat the 82H (V)
and 83H (W) addresses. They can also be ac-
cessed with the direct and bit direct addressing
modes. Accordingly, the ST638x instruction set
can use the short direct registersas any other reg-
ister of the data space.
Program Counter (PC)
The program counter is a 12-bit register that con-
tains the address of the next ROM location to be
processed bythe core.This ROMlocationmay be
an opcode,an operand, or an address of operand.
The 12-bit length allows the direct addressing of
4096 bytes in the program space. Nevertheless,if
the programspace contains more than 4096 loca-
tions, the furtherprogram spacecan be addressed
by usingtheProgramROM PageRegister.The PC
value isincremented,afteritisread forthe address
of the current instruction,by sendingit through the
ALU, so giving the address of the next byte in the
program. Toexecuterelativejumpsthe PCand the
offset values are shifted through the ALU, where
they will be added, and the result is shifted back
into the PC. The program countercan be changed
in thefollowingways:
JP (Jump) instruction....PC=Jump address
CALL instruction...........PC=Call address
Relative Branch
instructions...................PC=PC+offset
Interrupt........................PC=Interruptvector
Reset............................PC=Reset vector
RET & RETI instructions............PC=Pop (stack)
Normal instruction........PC=PC+1
WHEN CALL
INTERRUOR
OCCURS
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
PROGRAM COUNTER
WHEN
ROCCURS
VA000424
Figure 5. Stack Operation
Flags (C, Z)
The ST6369Core includesthree pairsof flagsthat
correspond to 3different modes: normalmode, in-
terrupt mode and Non-Maskable-Interrupt-Mode.
Each pair consists of a CARRY flag and a ZERO
flag. One pair (CN, ZN) is used duringnormal op-
eration, one pair is used during the interruptmode
(CI,ZI) andone isusedduring the not-maskablein-
terrupt mode (CNMI, ZNMI).
The ST6369 Core uses the pair of flags that corre-
spondsto the actualmode:as soon as an interrupt
(resp. a Non-Maskable-Interrupt) is generated,the
ST6369Core usesthe interruptflags (resp.the NMI
flags) insteadofthenormalflags.WhentheRETI in-
structionis executed,the normalflags(resp. the in-
terrupt flags) are restored if the MCU was in the
normalmode(resp.inthe interruptmode)beforethe
interrupt.Shouldbe observedthateach flag set can
onlybe addressedin its own routine(Not-maskable
interrupt,normalinterruptormainroutine).Theinter-
ruptflags are not clearedduring the contextswitch-
ingand so,theyremainin thestate theywere at the
exitof the lastroutine switching.
The Carry flag is set when a carry or a borrow oc-
curs during arithmetic operations, otherwise it is
cleared. The Carry flag is also set to the value of
the bit tested in a bit test instruction, and partici-
pates in the rotate leftinstruction.
The Zeroflagis setif theresultofthelast arithmetic
or logical operation wasequal to zero, otherwise it
is cleared.
The switching between these three sets is auto-
matically performedwhen an NMI,an interrupt and
a RETI instructions occur. As the NMI mode is
automatically selected after the reset of the MCU,
the ST6369Core uses at first the NMI flags.
ST6369
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