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參數(shù)資料
| 型號： | ST6375B1/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | SHRINK, PLASTIC, DIP-42 |
| 文件頁數(shù)： | 37/84頁 |
| 文件大?。?/td> | 861K |
| 代理商： | ST6375B1/XXX |
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ST6365, ST6375, ST6385 ST6367, ST6377, ST6387
SERIAL PERIPHERAL INTERFACE (Cont’d)
During transmission or reception of data, all ac-
cess to serial data register is therefore disabled.
The reception or transmission of data is started by
setting the BUSY bit to “1”; this will be automatical-
ly reset at the end of the operation. After reset, the
busy bit is cleared to “0”, and the hardware SPI
disabled by clearing bit 0 and bit 1 of SPI control
register 1 to “0”. The outputs from the hardware
SPI are “ANDed” to the standard I/O software con-
trolled outputs. If the hardware SPI is in operation
the Port C pins related to the SPI should be config-
ured as outputs using the Data Direction Register
and should be set high. When the SPI is config-
ured as the S-BUS, the three pins PC0, PC1 and
PC3 become the pins SCL, SDA and SEN respec-
tively. When configured as the I
2C BUS the pins
PC0 and PC1 are configured as the pins SCL and
SDA; PC3 is not driven and can be used as a gen-
eral purpose I/O pin. In the case of the STD SPI
the pins PC0 and PC1 become the signals CLOCK
and DATA, PC3 is not driven and can be used as
general purpose I/O pin. The VERIFY bit is availa-
ble when the SPI is configured as either S-BUS or
I
2C BUS. At the start of a byte transmission, the
verify bit is set to one. If at any time during the
transmission of the following eight bits, the data on
the SDA line does not match the data forced by the
SPI (while SCL is high), then the VERIFY bit is re-
set. The verify is available only during transmis-
sion for the S-BUS and I
2C BUS; for other protocol
it is not defined. The SDA and SCL signal entering
the SPI are buffered in order to remove any minor
glitches. When STD bit is set to one (S-BUS or I
2C
BUS selected), and TRX bit is reset (receiving da-
ta), and STOP bit is set (last byte of current com-
munication), the SPI interface does not generate
the Acknowledge, according to S-BUS/I
2C BUS
specifications. PCO-SCL, PC1-SDA and PC3-
SEN lines are standard drive I/O port pins with
open-drain output configuration (maximum voltage
that can be applied to these pins is VDD+ 0.3V).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST6367B1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6382B1/XXX | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
| ST6386B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6388B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6387B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST6377 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6377B1/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| ST63-7-W1-22-9-120 | 制造商:TE Connectivity 功能描述:ST63-7-W1-22-9-120 |
| ST63-7-W1-22-9-120CS28 | 制造商:TE Connectivity 功能描述:E53797N001 |
| ST63-7-W1-22-9-120CS2894 | 制造商:TE Connectivity 功能描述: |
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