- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄372306 > ST62P20CM3 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. A/D CONVERTER. OSCILLATOR SAFEGUARD. SAFE RESET AND 20 PINS PDF資料下載
參數(shù)資料
| 型號(hào)： | ST62P20CM3 |
| 英文描述： | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. A/D CONVERTER. OSCILLATOR SAFEGUARD. SAFE RESET AND 20 PINS |
| 中文描述： | 8位微控制器（MCU）的與檢察官辦公室。光盤(pán)。 FASTROM。存儲(chǔ)器。的A / D轉(zhuǎn)換器。振蕩器保障。安全復(fù)位和20圖釘 |
| 文件頁(yè)數(shù)： | 45/84頁(yè) |
| 文件大小： | 918K |
| 代理商： | ST62P20CM3 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)當(dāng)前第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)
45/84
ST62T53C/T60C/T63C ST62E60C
TIMER
(Cont’d)
A write to the TCR register will predominate over
the 8-bit counter decrement to 00h function, i.e. if a
write and a TCR register decrement to 00h occur
simultaneously, the write will take precedence,
and the TMZ bit is not set until the 8-bit counter
reaches 00h again. The values of the TCR and the
PSC registers can be read accurately at any time.
4.2.4 Timer Registers
Timer Status Control Register (TSCR)
Address: 0D4h
—
Read/Write
Bit 7 =
TMZ
:
Timer Zero bit
A low-to-high transition indicates that the timer
count register has decrement to zero. This bit
must be cleared by user software before starting a
new count.
Bit 6 =
ETI
:
Enable Timer Interrup
When set, enables the timer interrupt request
(vector #4). If ETI=0 the timer interrupt is disabled.
If ETI=1 and TMZ=1 an interrupt request is gener-
ated.
Bit 5 =
D5
:
Reserved
Must be set to “1”.
Bit 4 =
D4
Do not care.
Bit 3 =
PSI
:
Prescaler Initialize Bit
Used to initialize the prescaler and inhibit its count-
ing. When PSI=“0” the prescaler is set to 7Fh and
the counter is inhibited. When PSI=“1” the prescal-
er is enabled to count downwards. As long as
PSI=“0” both counter and prescaler are not run-
ning.
Bit 2, 1, 0 =
PS2, PS1, PS0
:
Prescaler Mux. Se-
lect.
These bits select the division ratio of the pres-
caler register.
Table 12. Prescaler Division Factors
Timer Counter Register (TCR)
Address: 0D3h
—
Read/Write
Bit 7-0 =
D7-D0
:
Counter Bits.
Prescaler Register PSC
Address: 0D2h
—
Read/Write
Bit 7 =
D7
: Always read as "0".
Bit 6-0 =
D6-D0
: Prescaler Bits.
7
0
TMZ
ETI
D5
D4
PSI
PS2
PS1
PS0
PS2
0
0
0
0
1
1
1
1
PS1
0
0
1
1
0
0
1
1
PS0
0
1
0
1
0
1
0
1
Divided by
1
2
4
8
16
32
64
128
7
0
D7
D6
D5
D4
D3
D2
D1
D0
7
0
D7
D6
D5
D4
D3
D2
D1
D0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST62P20CM6 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. A/D CONVERTER. OSCILLATOR SAFEGUARD. SAFE RESET AND 20 PINS |
| ST62P30BB1 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 16-BIT AUTO-RELOAD TIMER. EEPROM. SPI. UART AND 28 PINS |
| ST62P30BB3 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 16-BIT AUTO-RELOAD TIMER. EEPROM. SPI. UART AND 28 PINS |
| ST62P30BB6 | IC, 60FBGA, 512MBIT DDR DRAM 60 PIN BGA 32MBX16 |
| ST62P30BM1 | IC, MEM, SDRAM DDR166, 32 MEG X 16, 16 BIT, 6NS, 2.5V, FBGA60 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST62P52C | 制造商:STMicroelectronics 功能描述: |
| ST62P62CM6/MOMTR | 制造商:STMicroelectronics 功能描述: |
| ST62P62CM6/MPITR | 制造商:STMicroelectronics 功能描述: |
| ST62P62CM6/MSATR | 制造商:STMicroelectronics 功能描述: |
| ST62P62CN6/MMMTR | 制造商:STMicroelectronics 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。