參數資料
型號: ST6215LB1
廠商: 意法半導體
英文描述: LOW VOLTAGE 8-BIT ROM MCUs WITH A/D CONVERTER AND 28 PINS
中文描述: 低電壓的8位ROM微控制器使用A / D轉換器和28個引腳
文件頁數: 17/70頁
文件大?。?/td> 472K
代理商: ST6215LB1
17/70
17
ST62T15C/T25C/E25C
CLOCK SYSTEM
(Cont’d)
Figure 11. Clock Circuit Block Diagram
Figure 12. Maximum Operating Frequency (f
MAX
) versus Supply Voltage (V
DD
)
Notes
:
1. In this area, operation is guaranteed at the
quartz crystal frequency.
2. When the OSG is disabled, operation in this
area is guaranteed at the crystal frequency. When
the OSG is enabled, operation in this area is guar-
anteed at a frequency of at least f
OSG Min.
3. When the OSG is disabled, operation in this
area is guaranteed at the quartz crystalfrequency.
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept a f
OSG.
4. When the OSG is disabled, operation in this
area is not guaranteed
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept at f
OSG.
MAIN
OSCILLATOR
OSG
LFAO
M
U
X
Core
: 13
: 12
: 1
TIMER 1
Watchdog
POR
f
INT
Main Oscillator off
1
2.5
3.6
4
4.5
5
5.5
6
8
7
6
5
4
3
2
Maximum FREQUENCY (MHz)
SUPPLY VOLTAGE (V
DD
)
F
3
4
3
2
1
f
OSG
f
OSG
Min
G
I
VR01807
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