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參數(shù)資料
| 型號(hào)： | ST6215CM1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS |
| 中文描述： | 8位檢察官辦公室/存儲(chǔ)器與阿微控制器/ D轉(zhuǎn)換器，振蕩器保障，安全復(fù)位和28個(gè)引腳 |
| 文件頁數(shù)： | 17/70頁 |
| 文件大?。?/td> | 472K |
| 代理商： | ST6215CM1 |
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17
ST62T15C/T25C/E25C
CLOCK SYSTEM
(Cont’d)
Figure 11. Clock Circuit Block Diagram
Figure 12. Maximum Operating Frequency (f
MAX
) versus Supply Voltage (V
DD
)
Notes
:
1. In this area, operation is guaranteed at the
quartz crystal frequency.
2. When the OSG is disabled, operation in this
area is guaranteed at the crystal frequency. When
the OSG is enabled, operation in this area is guar-
anteed at a frequency of at least f
OSG Min.
3. When the OSG is disabled, operation in this
area is guaranteed at the quartz crystalfrequency.
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept a f
OSG.
4. When the OSG is disabled, operation in this
area is not guaranteed
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept at f
OSG.
MAIN
OSCILLATOR
OSG
LFAO
M
U
X
Core
: 13
: 12
: 1
TIMER 1
Watchdog
POR
f
INT
Main Oscillator off
1
2.5
3.6
4
4.5
5
5.5
6
8
7
6
5
4
3
2
Maximum FREQUENCY (MHz)
SUPPLY VOLTAGE (V
DD
)
F
3
4
3
2
1
f
OSG
f
OSG
Min
G
I
VR01807
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