參數(shù)資料
型號： ST25W08M5TR
廠商： 意法半導體
元件分類： DRAM
英文描述： 8 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection
中文描述： 8千位串行I2C總線的EEPROM與用戶定義的塊寫保護
文件頁數(shù)： 7/16頁
文件大?。?/td> 125K
代理商： ST25W08M5TR
SCL
SDA IN
SCL
SDA OUT
SCL
SDA IN
tCHCL
tDLCL
tCHDX
START
CONDITION
tCLCH
tDXCX
tCLDX
SDA
INPUT
SDA
CHANGE
tCHDH
tDHDL
STOP &
BUS FREE
DATA VALID
tCLQV
tCLQX
DATA OUTPUT
tCHDH
STOP
CONDITION
tCHDX
START
CONDITION
WRITE CYCLE
tW
AI00795B
Figure 5. AC Waveforms
Write Operations
The Multibyte Write mode (only available on the
ST24/25C08 versions) is selected when the MODE
pin is at V
IH
and the Page Write mode when MODE
pin is at V
IL
. The MODE pin may be driven dynami-
cally with CMOS input levels.
Following a START condition the master sends a
device select code with the RW bit reset to ’0’. The
memory acknowledges this and waits for a byte
address. The byte address of 8 bits provides ac-
cess to one block of 256 bytes of the memory. After
receipt of the byte address the device again re-
sponds with an acknowledge.
For the ST24/25W08 versions, any write command
with WC = 1 will not modify the memory content.
Byte Write.
In the Byte Write mode the master
sends one data byte, which is acknowledged by the
memory. The master then terminates the transfer
by generating a STOP condition. The Write mode
is independant of the state of the MODE pin which
could be left floating if only this mode was to be
used. However it is not a recommended operating
mode, as this pin has to be connected to either V
IH
or V
IL
, to minimize the standby current.
7/16
ST24/25C08, ST24/25W08
相關(guān)PDF資料
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