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參數(shù)資料
| 型號： | ST25W08M5 |
| 廠商： | 意法半導體 |
| 英文描述： | FPGA Logic IC; Logic Type:Programmable; Package/Case:780-BGA |
| 中文描述： | I2C串行EEPROM的 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 125K |
| 代理商： | ST25W08M5 |
AI01121B
3FFh
b7
b2
X
X
300h
Block 3
Block 0
Protect Flag
Enable = 0
Disable = 1
Page
pointer
b4
0
Figure 7. Memory Protection
of data, which are each acknowledged by the mem-
ory. After each byte is transfered, the internal byte
address counter (4 least significant bits only) is
incremented. The transfer is terminated by the
master generating a STOP condition. Care must be
taken to avoid address counter ’roll-over’ which
could result in data being overwritten. Note that, for
any write mode, the generation by the master of the
STOP condition starts the internal memory pro-
gram cycle. All inputs are disabled until the comple-
tion of this cycle and the memory will not respond
to any request.
Minimizing System Delays by Polling On ACK.
During the internal write cycle, the memory discon-
nects itself from the bus in order to copy the data
from the internal latches to the memory cells. The
maximum value of the write time (t
W
) is given in the
AC Characteristics table, since the typical time is
shorter, the time seen by the system may be re-
duced by an ACK polling sequence issued by the
master.
WRITE Cycle
in Progress
AI01099B
Next
Operation is
Addressing the
Memory
START Condition
DEVICE SELECT
with RW = 0
ACK
Returned
YES
NO
YES
NO
ReSTART
STOP
Proceed
WRITE Operation
Proceed
Random Address
READ Operation
Send
Byte Address
First byte of instruction
with RW = 0 already
decoded by ST24xxx
Figure 8. Write Cycle Polling using ACK
9/16
ST24/25C08, ST24/25W08
相關PDF資料 |
PDF描述 |
|---|---|
| ST25W08M6 | FPGA, CYCLONE III, 10K LE, UBGA256; Logic IC family:FPGA; Logic IC Base Number:3; Logic IC function:EP3C10; Voltage, supply:1.20V; Case style:UBGA; I/O lines, No. of:182; IC Generic number:3C10U256; Logic function number:3C10U256; RoHS Compliant: Yes |
| ST24C16CM1 | Cyclone FPGA 6K FBGA-256 |
| ST24C16B6TR | 16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
| ST24C16 | 16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
| ST24C16M6TR | 16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST25W08M5TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
| ST25W08M6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:I2C Serial EEPROM |
| ST25W08M6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
| ST25W16 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection |
| ST25W16B1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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