參數(shù)資料
型號: ST25C16B5TR
廠商: 意法半導(dǎo)體
元件分類: DC/DC變換器
英文描述: RSD Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 15V; Output Voltage (Vdc): 15V; Power: 1W; 1kVDC and 3kVDC Isolation Options; Approved for Medical Applications; Suitable for Automated Assembly; 8, 10 and 12 pin Pinning Style Options; Optional Continuous Short Circuit Protected; Efficiency to 85%
中文描述: 16千位串行I2C總線的EEPROM與用戶定義的塊寫保護(hù)
文件頁數(shù): 4/17頁
文件大小: 126K
代理商: ST25C16B5TR
AI01100
VCC
CBUS
SDA
RL
MASTER
RL
SCL
CBUS
100
200
300
400
0
4
8
12
16
20
CBUS (pF)
R
)
VCC = 5V
Figure 3. Maximum R
L
Value versus Bus Capacitance (C
BUS
) for an I
2
C Bus
SIGNALS DESCRIPTION
Serial Clock (SCL).
The SCL input signal is used
to synchronise all data in and out of the memory. A
resistor can be connected from the SCL line to V
CC
to act as a pull up (see Figure 3).
Serial Data (SDA).
The SDA signal is bi-directional
and is used to transfer data in or out of the memory.
It is an open drain output that may be wire-OR’ed
with other open drain or open collector signals on
the bus. A resistor must be connected from the SDA
bus line to V
CC
to act as pull up (see Figure 3).
Protected Block Select (PB0, PB1).
PB0 and PB1
input signals select the block in the upper part of
the memory where write protection starts. These
inputs have a CMOS compatible input level.
Protect Enable (PRE).
The PRE input signal, in
addition to the status of the Block Address Pointer
bit (b2, location 7FFh as in Figure 7), sets the PRE
write protection active.
Mode (MODE).
The MODE input is available on pin
7 (see also WC feature) and may be driven dynami-
cally. It must be at V
IL
or V
IH
for the Byte Write
mode, V
IH
for Multibyte Write mode or V
IL
for Page
Write mode. When unconnected, the MODE input
is internally read as V
IH
(Multibyte Write mode).
Write Control (WC).
An hardware Write Control
feature is offered only for ST24W16 and ST25W16
versions on pin 7. This feature is usefull to protect
the contents of the memory from any erroneous
erase/write cycle. The Write Control signal is used
to enable (WC at V
IH
) or disable (WC at V
IL
) the
internal write protection. When unconnected, the
WC input is internally read as V
IL
. The devices with
this Write Control feature no longer supports the
Multibyte Write mode of operation, however all
other write modes are fully supported.
Refer to the AN404 Application Note for more de-
tailed information about Write Control feature.
4/17
ST24/25C16, ST24/25W16
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