- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3763 > ST16C650ACJ44-F (Exar Corporation)IC UART FIFO 32B 44PLCC PDF資料下載
參數(shù)資料
| 型號： | ST16C650ACJ44-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 26/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 32B 44PLCC |
| 標準包裝： | 27 |
| 特點： | * |
| 通道數(shù)： | 1，UART |
| FIFO's： | 32 字節(jié) |
| 規(guī)程： | 打印機，RS232，RS422，RS485 |
| 電源電壓： | 2.9 V ~ 5.5 V |
| 帶并行端口： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 其它名稱： | 1016-1663 ST16C650ACJ44-F-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
ST16C650A
32
2.90V TO 5.5V UART WITH 32-BYTE FIFO
REV. 5.0.3
LSR[5]: Transmit Holding Register Empty Flag
This bit is the Transmit Holding Register Empty indicator. The THR bit is set to a logic 1 when the last data byte
is transferred from the transmit holding register to the transmit shift register. The bit is reset to logic 0
concurrently with the data loading to the transmit holding register by the host. In the FIFO mode this bit is set
when the transmit FIFO is empty, it is cleared when the transmit FIFO contains at least 1 byte.
LSR[6]: Transmit Shift Register Empty Flag
This bit is the Transmit Shift Register Empty indicator. This bit is set to a logic 1 whenever the transmitter goes
idle. It is set to logic 0 whenever either the THR or TSR contains a data character. In the FIFO mode this bit is
set to one whenever the transmit FIFO and transmit shift register are both empty.
LSR[7]: Receive FIFO Data Error Flag
Logic 0 = No FIFO error (default).
Logic 1 = A global indicator for the sum of all error bits in the RX FIFO. At least one parity error, framing error
or break indication is in the FIFO data. This bit clears when there is no more error(s) in the FIFO.
4.9
Extra Feature Register (XFR) - Write Only
This register provides additional features and controls to the ST16C650A UART.
XFR [0]: Half-duplex Infrared Mode Enable
When infrared mode is enabled, MCR bit-6=1, this bit selects the infrared mode to operate in normal full-duplex
or half-duplex mode. This half-duplex mode feature is very desirable when the UART does not want to “see” its
own data that may be reflected.
Logic 0 = Disable. The receiver is active during data transmission.
Logic 1 = Enable half-duplex operation. The infrared receiver is disabled during data transmission.
XFR [1]: Invert Received Infrared Input Signal
This bit controls the input polarity of the infrared data.
Logic 0 = Infrared data input idles at logic 0 (default).
Logic 1 = Infrared data idles at logic 1, pulses low.
XFR [2]: Auto RS485 Enable
This bit enables the auto RS485 direction control feature for half-duplex operation with RS-485 transceiver.
The feature should only be enabled when normal RTS# output and auto RTS flow control are not used.
Logic 0 = Disable the auto RS485 direction control function. This allows normal RTS# output or auto RTS
flow control operation.
Logic 1 = Enable the auto RS485 direction function. The RTS# output will automatically change its logic state
to control the RS-485 transceiver from sending and receiving. SEE”AUTO RS485 HALF-DUPLEX
XFR [3]: LSR Bad Data Interrupt Operation
When the LSR interrupt is enabled, IER bit-2=1, this bit selects when the interrupt pin (INT) will report received
character error: parity, framing or break. Use this feature only if application needs immediate knowledge when
a bad character is received.
Logic 0 = Received data error interrupt (LSR interrupt) will be generated when the bad character is available
for reading from the FIFO. This is compatible to industry standard 16C550 operation.
Logic 1 = Received data error interrupt (LSR interrupt) is generated immediately upon receipt of the bad
character. It will be reset when LSR is read. If user does not read the bad character out, another bad
character interrupt is generated when it’s available for reading from the FIFO.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR20M1170IG24-F | IC UART FIFO I2C/SPI 64B 24TSSOP |
| XR20M1170IG16-F | IC UART FIFO I2C/SPI 64B 16TSSOP |
| MAX3110EEWI+G36 | IC UART SPI COMPAT 28-SOIC |
| MAX3111EEWI+G36 | IC TXRX RS232 SPI W/CAP 28-SOIC |
| MAX3110ECWI+G36 | IC UART/TXRX RS232 W/CAPS 28SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C650ACJ44TR-F | 功能描述:UART 接口集成電路 UART W/32BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C650ACP40 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.90V TO 5.5V UART WITH 32-BYTE FIFO |
| ST16C650ACQ-0A-EB | 功能描述:界面開發(fā)工具 Supports C650A 48 ld TQFP, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C650ACQ48 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:UART, 48 Pin, Plastic, TQFP |
| ST16C650ACQ48-F | 功能描述:UART 接口集成電路 UART W/32BYTEFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。