參數資料
型號: ST16C454CJ68TR-F
廠商: Exar Corporation
文件頁數: 25/29頁
文件大?。?/td> 0K
描述: IC UART QUAD 68PLCC
標準包裝: 250
特點: *
通道數: 4,QUART
FIFO's: 1 字節(jié)
電源電壓: 2.97 V ~ 5.5 V
帶故障啟動位檢測功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應商設備封裝: 68-PLCC
包裝: 帶卷 (TR)
ST16C454
5
Rev. 3.31
D0-D2
66-68
I/O
D3-D7
1-5
Data Bus (Bi-directional) - These pins are the eight bit, three state
data bus for transferring information to or from the controlling CPU.
D0 is the least significant bit and the first data bit in a transmit or
receive serial data stream.
GND
6,23
GND
40,57
Pwr
Signal and power ground.
INT A-B
15,21
INT C-D
49,55
O
Interrupt A, B, C, D (active high) - This function is associated with
the 16 mode only. These pins provide individual channel inter-
rupts, INT A-D. INT A-D are enabled when MCR bit-3 is set to a
logic 1, interrupts are enabled in the interrupt enable register (IER),
and when an interrupt condition exists. Interrupt conditions in-
clude: receiver errors, available receiver buffer data, transmit
buffer empty, or when a modem status flag is detected. When the
68 mode is selected, the functions of these pins are reassigned. 68
mode functions are described under the their respective name/pin
headings.
INTSEL
65
I
Interrupt Select. (active high, with internal pull-down) - This
function is associated with the 16 mode only. When the 16 mode
is selected, this pin can be used in conjunction with MCR bit-3 to
enable or disable the three state interrupts, INT A-D or override
MCR bit-3 and force continuous interrupts. Interrupt outputs are
enabled continuously by making this pin a logic 1. Making this pin
a logic 0 allows MCR bit-3 to control the three state interrupt output.
In this mode, MCR bit-3 is set to a logic “1” to enable the three state
outputs. This pin is disabled in the 68 mode.
-IOR
52
I
Read strobe. (active low Strobe) - This function is associated with
the 16 mode only. A logic 0 transition on this pin will load the
contents of an Internal register defined by address bits A0-A2 onto
the ST16C454 data bus (D0-D7) for access by an external CPU.
This pin is disabled in the 68 mode.
-IOW
18
I
Write strobe. (active low strobe) - This function is associated with
the 16 mode only. A logic 0 transition on this pin will transfer the
contents of the data bus (D0-D7) from the external CPU to an
internal register that is defined by address bits A0-A2. When the
16 mode is selected, this pin functions as R/-W, see definition under
Symbol
Pin
Signal
Pin Description
type
SYMBOL DESCRIPTION
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