TABLE 11: UART RESET CONDITIONS FOR CHANNEL A AND B DLL Bits 7-0 = 0xXX DLM Bits" />
參數(shù)資料
型號(hào): ST16C2552IJ44-F
廠商: Exar Corporation
文件頁(yè)數(shù): 18/34頁(yè)
文件大?。?/td> 0K
描述: IC UART FIFO 16B DUAL 44PLCC
標(biāo)準(zhǔn)包裝: 27
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 3.3 V ~ 5 V
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
其它名稱: 1016-1258-5
TABLE 11: UART RESET CONDITIONS FOR CHANNEL A AND B
DLL
Bits 7-0 = 0xXX
DLM
Bits 7-0 = 0xXX
AFR
Bits 7-0 = 0x00
RHR
Bits 7-0 = 0xXX
THR
Bits 7-0 = 0xXX
IER
Bits 7-0 = 0x00
FCR
Bits 7-0 = 0x00
ISR
Bits 7-0 = 0x01
LCR
Bits 7-0 = 0x00
MCR
Bits 7-0 = 0x00
LSR
Bits 7-0 = 0x60
MSR
Bits 3-0 = Logic 0
Bits 7-4 = Logic levels of the inputs inverted
SPR
Bits 7-0 = 0xFF
TX
Logic 1
MF#
Logic 1
RTS#
Logic 1
DTR#
Logic 1
TXRDY#
Logic 0
INT
Logic 0
ST16C2552
25
REV. 4.2.2
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
REGISTERS
RESET STATE
I/O SIGNALS
RESET STATE
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