參數(shù)資料
型號(hào)： SSTUA32866EC/G,551
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
封裝： 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96
文件頁(yè)數(shù)： 2/28頁(yè)
文件大小： 153K
代理商： SSTUA32866EC/G,551
SSTUA32866_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 26 March 2007
10 of 28
NXP Semiconductors
SSTUA32866
1.8 V DDR2-667 congurable registered buffer with parity
8.
Limiting values
[1]
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
[2]
This value is limited to 2.5 V maximum.
9.
Recommended operating conditions
[1]
The RESET and Cn inputs of the device must be held at valid levels (not oating) to ensure proper device operation.
[2]
The differential inputs must not be oating, unless RESET is LOW.
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
0.5
+2.5
V
VI
input voltage
receiver
0.5[1]
+2.5[2]
V
VO
output voltage
driver
0.5[1]
VDD + 0.5[2]
V
IIK
input clamping current
VI < 0 V or VI >VDD
-
50
mA
IOK
output clamping current
VO < 0 V or VO >VDD
-
±50
mA
IO
output current
continuous; 0 V < VO < VDD
-
±50
mA
ICCC
continuous current through
each VDD or GND pin
-
±100
mA
Tstg
storage temperature
65
+150
°C
Vesd
electrostatic discharge
voltage
Human Body Model (HBM); 1.5 k
; 100 pF
2
-
kV
Machine Model (MM); 0
; 200 pF
200
-
V
Table 6.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
1.7
-
2.0
V
Vref
reference voltage
0.49
× VDD
0.50
× VDD 0.51 × VDD
V
VT
termination voltage
Vref 0.040
Vref
Vref + 0.040
V
VI
input voltage
0
-
VDD
V
VIH(AC)
AC HIGH-level input voltage
data (Dn), CSR, and
PAR_IN inputs
Vref + 0.250
-
V
VIL(AC)
AC LOW-level input voltage
data (Dn), CSR, and
PAR_IN inputs
--
Vref 0.250
V
VIH(DC)
DC HIGH-level input voltage
data (Dn), CSR, and
PAR_IN inputs
Vref + 0.125
-
V
VIL(DC)
DC LOW-level input voltage
data (Dn), CSR, and
PAR_IN inputs
--
Vref 0.125
V
VIH
HIGH-level input voltage
RESET, Cn
[1] 0.65
× VDD
--
V
VIL
LOW-level input voltage
RESET, Cn
-
0.35
× VDD
V
VICR
common mode input voltage range CK, CK
[2] 0.675
-
1.125
V
VID
differential input voltage
CK, CK
[2] 600
-
mV
IOH
HIGH-level output current
-
8mA
IOL
LOW-level output current
-
8
mA
Tamb
ambient temperature
operating in free air
0
-
+70
°C
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