參數(shù)資料
型號(hào): SST89V54RD2-33-C-TQJE
廠商: Microchip Technology
文件頁(yè)數(shù): 36/92頁(yè)
文件大小: 0K
描述: IC MCU 8BIT 24KB FLASH 44TQFP
標(biāo)準(zhǔn)包裝: 160
系列: FlashFlex®
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 8K x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-TQFP
包裝: 托盤
2011 Silicon Storage Technology, Inc.
DS25087A
10/11
41
FlashFlex MCU
SST89V54RD2/RD / SST89V58RD2/RD
Not Recommended for New Designs
A Microchip Technology Company
Enable-Clock-Double
Enable-Clock-Double command is used to make the MCU run at 6 clocks per machine cycle. The stan-
dard (default) is 12 clocks per machine cycle (i.e. clock double command disabled).
Figure 16:Enable-Clock-Double
Polling
A command that uses the polling method to detect flash operation completion should poll on the
FLASH_BUSY bit (SFST[2]). When FLASH_BUSY de-asserts (logic 0), the device is ready for the next
operation.
MOVC instruction may also be used for verification of the Programming and Erase operation of the
flash memory. MOVC instruction will fail if it is directed at a flash block that is still busy.
Program Enable-Clock-Double
Interrupt scheme
MOV SFCM, #88H
Program Enable-Clock-Double
Polling scheme
MOV SFCM, #08H
INT1# Interrupt
indicates completion
Polling SFST[2]
indicates completion
1255 F15.0
IAP Enable
ORL SFCF, #40H
Set-up Enable-Clock-Double
MOV SFAH, #55H
MOV SFDT, #0AAH
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SST89V54RD2-33-C-TQJ-E 功能描述:8位微控制器 -MCU 24K(16Kx8K) 33nS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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