參數(shù)資料
        型號: SST89E54RD2-40-C-TQI
        廠商: Silicon Storage Technology, Inc.
        英文描述: DIODE SWITCH 80V 25MA SOT-353
        中文描述: FlashFlex51單片機
        文件頁數(shù): 52/91頁
        文件大?。?/td> 984K
        代理商: SST89E54RD2-40-C-TQI
        52
        Preliminary Specifications
        FlashFlex51 MCU
        SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
        SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
        2004 Silicon Storage Technology, Inc.
        S71255-00-000
        3/04
        The table below summarizes various clock inputs at two common frequencies.
        The four possible CMOD timer modes with and without the overflow interrupt enabled are shown below. This list
        assumes that PCA will be left running during idle mode.
        The CCON register is associated with all PCA timer functions. It contains run control bits and flags for the PCA
        timer (CF) and all modules. To run the PCA the CR bit (CCON.6) must be set by software. Clearing the bit, will turn
        off PCA. When the PCA counter overflows, the CF (CCON.7) will be set, and an interrupt will be generated if the
        ECF bit in the CMOD register is set. The CF bit can only be cleared by software. Each module has its own timer
        interrupt or capture interrupt flag (CCF0 for module 0, CCF4 for module 4, etc.). They are set when either a match
        or capture occurs. These flags can only be cleared by software. (See “PCA Timer/Counter Control Register
        (CCON)” on page 27.)
        TABLE
        8-2: PCA T
        IMER
        /C
        OUNTER
        I
        NPUTS
        PCA Timer/Counter Mode
        Mode 0: f
        OSC
        /12
        Mode 1:
        Mode 2: Timer 0 Overflows
        1
        Timer 0 programmed in:
        8-bit mode
        16-bit mode
        8-bit auto-reload
        Mode 3: External Input MAX
        Clock Increments
        12 MHz
        1 μsec
        330 nsec
        16 MHz
        0.75 μsec
        250 nsec
        1. In Mode 2, the overflow interrupt for Timer 0 does not need to be enabled.
        256 μsec
        65 msec
        1 to 255 μsec
        0.66 μsec
        192 μsec
        49 μsec
        0.75 to 191 μsec
        0.50 μsec
        T8-2.0 1255
        TABLE
        8-3: CMOD V
        ALUES
        PCA Count Pulse Selected
        Internal clock, f
        OSC
        /12
        Internal clock, f
        OSC
        /4
        Timer 0 overflow
        External clock at P1.2
        CMOD Value
        Without Interrupt Enabled
        00H
        02H
        04H
        06H
        With Interrupt Enabled
        01H
        03H
        05H
        07H
        T8-3.0 1255
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