參數(shù)資料
型號: SST89E52RC-33-C-PIE
廠商: Microchip Technology
文件頁數(shù): 54/71頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 9KB FLASH 40PDIP
標準包裝: 9
系列: FlashFlex®
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,UART/USART
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
2011 Silicon Storage Technology, Inc.
DS25088A
10/11
58
FlashFlex MCU
SST89E52RC / SST89E54RC
Data Sheet
A Microchip Technology Company
2. Capacitive loading on Ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and Ports 1 and
3. The noise due to external bus capacitance discharging into the Port 0 and 2 pins when the pins make 1-to-0 transi-
tions during bus operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may
exceed 0.8V. In such cases, it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a
Schmitt Trigger STROBE input.
3. Load capacitance for Port 0, ALE and PSEN#= 100pF, load capacitance for all other outputs = 80 pF.
4. Capacitive loading on Ports 0 and 2 may cause the VOH on ALE and PSEN# to momentarily fall below the VDD - 0.7
specification when the address bits are stabilizing.
5. Capacitive loading on Ports 0 and 2 may cause the VOH on ALE and PSEN# to momentarily fall below the VDD - 0.7
specification when the address bits are stabilizing.
6. Pin capacitance is characterized but not tested. EA# is 25pF (max).
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